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b765f4be40
Refreshed all patches. Altered patches: - 150-bridge_allow_receiption_on_disabled_port.patch - 201-extra_optimization.patch Remove upstreamed: - 022-0006-crypto-crypto4xx-properly-set-IV-after-de-and-encryp.patch Compile-tested on: ar71xx, cns3xxx, imx6, x86_64 Runtime-tested on: ar71xx, cns3xxx, imx6 Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
248 lines
7.9 KiB
Diff
248 lines
7.9 KiB
Diff
From 98e87e3d933b8e504ea41b8857c038d2cd06cddc Mon Sep 17 00:00:00 2001
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From: Christian Lamparter <chunkeey@gmail.com>
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Date: Thu, 19 Apr 2018 18:41:54 +0200
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Subject: [PATCH 5/8] crypto: crypto4xx - add aes-ctr support
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This patch adds support for the aes-ctr skcipher.
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name : ctr(aes)
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driver : ctr-aes-ppc4xx
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module : crypto4xx
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priority : 300
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refcnt : 1
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selftest : passed
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internal : no
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type : skcipher
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async : yes
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blocksize : 16
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min keysize : 16
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max keysize : 32
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ivsize : 16
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chunksize : 16
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walksize : 16
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The hardware uses only the last 32-bits as the counter while the
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kernel tests (aes_ctr_enc_tv_template[4] for example) expect that
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the whole IV is a counter. To make this work, the driver will
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fallback if the counter is going to overlow.
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The aead's crypto4xx_setup_fallback() function is renamed to
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crypto4xx_aead_setup_fallback.
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Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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---
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drivers/crypto/amcc/crypto4xx_alg.c | 91 ++++++++++++++++++++++++++--
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drivers/crypto/amcc/crypto4xx_core.c | 37 +++++++++++
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drivers/crypto/amcc/crypto4xx_core.h | 5 ++
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3 files changed, 127 insertions(+), 6 deletions(-)
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--- a/drivers/crypto/amcc/crypto4xx_alg.c
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+++ b/drivers/crypto/amcc/crypto4xx_alg.c
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@@ -241,6 +241,85 @@ int crypto4xx_rfc3686_decrypt(struct skc
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ctx->sa_out, ctx->sa_len, 0);
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}
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+static int
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+crypto4xx_ctr_crypt(struct skcipher_request *req, bool encrypt)
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+{
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+ struct crypto_skcipher *cipher = crypto_skcipher_reqtfm(req);
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+ struct crypto4xx_ctx *ctx = crypto_skcipher_ctx(cipher);
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+ size_t iv_len = crypto_skcipher_ivsize(cipher);
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+ unsigned int counter = be32_to_cpup((__be32 *)(req->iv + iv_len - 4));
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+ unsigned int nblks = ALIGN(req->cryptlen, AES_BLOCK_SIZE) /
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+ AES_BLOCK_SIZE;
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+
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+ /*
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+ * The hardware uses only the last 32-bits as the counter while the
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+ * kernel tests (aes_ctr_enc_tv_template[4] for example) expect that
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+ * the whole IV is a counter. So fallback if the counter is going to
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+ * overlow.
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+ */
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+ if (counter + nblks < counter) {
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+ struct skcipher_request *subreq = skcipher_request_ctx(req);
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+ int ret;
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+
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+ skcipher_request_set_tfm(subreq, ctx->sw_cipher.cipher);
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+ skcipher_request_set_callback(subreq, req->base.flags,
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+ NULL, NULL);
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+ skcipher_request_set_crypt(subreq, req->src, req->dst,
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+ req->cryptlen, req->iv);
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+ ret = encrypt ? crypto_skcipher_encrypt(subreq)
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+ : crypto_skcipher_decrypt(subreq);
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+ skcipher_request_zero(subreq);
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+ return ret;
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+ }
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+
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+ return encrypt ? crypto4xx_encrypt_iv(req)
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+ : crypto4xx_decrypt_iv(req);
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+}
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+
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+static int crypto4xx_sk_setup_fallback(struct crypto4xx_ctx *ctx,
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+ struct crypto_skcipher *cipher,
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+ const u8 *key,
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+ unsigned int keylen)
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+{
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+ int rc;
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+
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+ crypto_skcipher_clear_flags(ctx->sw_cipher.cipher,
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+ CRYPTO_TFM_REQ_MASK);
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+ crypto_skcipher_set_flags(ctx->sw_cipher.cipher,
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+ crypto_skcipher_get_flags(cipher) & CRYPTO_TFM_REQ_MASK);
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+ rc = crypto_skcipher_setkey(ctx->sw_cipher.cipher, key, keylen);
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+ crypto_skcipher_clear_flags(cipher, CRYPTO_TFM_RES_MASK);
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+ crypto_skcipher_set_flags(cipher,
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+ crypto_skcipher_get_flags(ctx->sw_cipher.cipher) &
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+ CRYPTO_TFM_RES_MASK);
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+
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+ return rc;
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+}
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+
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+int crypto4xx_setkey_aes_ctr(struct crypto_skcipher *cipher,
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+ const u8 *key, unsigned int keylen)
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+{
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+ struct crypto4xx_ctx *ctx = crypto_skcipher_ctx(cipher);
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+ int rc;
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+
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+ rc = crypto4xx_sk_setup_fallback(ctx, cipher, key, keylen);
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+ if (rc)
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+ return rc;
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+
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+ return crypto4xx_setkey_aes(cipher, key, keylen,
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+ CRYPTO_MODE_CTR, CRYPTO_FEEDBACK_MODE_NO_FB);
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+}
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+
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+int crypto4xx_encrypt_ctr(struct skcipher_request *req)
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+{
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+ return crypto4xx_ctr_crypt(req, true);
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+}
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+
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+int crypto4xx_decrypt_ctr(struct skcipher_request *req)
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+{
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+ return crypto4xx_ctr_crypt(req, false);
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+}
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+
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static inline bool crypto4xx_aead_need_fallback(struct aead_request *req,
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bool is_ccm, bool decrypt)
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{
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@@ -283,10 +362,10 @@ static int crypto4xx_aead_fallback(struc
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crypto_aead_encrypt(subreq);
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}
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-static int crypto4xx_setup_fallback(struct crypto4xx_ctx *ctx,
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- struct crypto_aead *cipher,
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- const u8 *key,
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- unsigned int keylen)
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+static int crypto4xx_aead_setup_fallback(struct crypto4xx_ctx *ctx,
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+ struct crypto_aead *cipher,
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+ const u8 *key,
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+ unsigned int keylen)
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{
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int rc;
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@@ -314,7 +393,7 @@ int crypto4xx_setkey_aes_ccm(struct cryp
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struct dynamic_sa_ctl *sa;
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int rc = 0;
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- rc = crypto4xx_setup_fallback(ctx, cipher, key, keylen);
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+ rc = crypto4xx_aead_setup_fallback(ctx, cipher, key, keylen);
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if (rc)
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return rc;
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@@ -473,7 +552,7 @@ int crypto4xx_setkey_aes_gcm(struct cryp
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return -EINVAL;
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}
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- rc = crypto4xx_setup_fallback(ctx, cipher, key, keylen);
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+ rc = crypto4xx_aead_setup_fallback(ctx, cipher, key, keylen);
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if (rc)
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return rc;
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--- a/drivers/crypto/amcc/crypto4xx_core.c
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+++ b/drivers/crypto/amcc/crypto4xx_core.c
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@@ -950,6 +950,19 @@ static int crypto4xx_sk_init(struct cryp
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struct crypto4xx_alg *amcc_alg;
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struct crypto4xx_ctx *ctx = crypto_skcipher_ctx(sk);
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+ if (alg->base.cra_flags & CRYPTO_ALG_NEED_FALLBACK) {
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+ ctx->sw_cipher.cipher =
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+ crypto_alloc_skcipher(alg->base.cra_name, 0,
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+ CRYPTO_ALG_NEED_FALLBACK |
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+ CRYPTO_ALG_ASYNC);
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+ if (IS_ERR(ctx->sw_cipher.cipher))
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+ return PTR_ERR(ctx->sw_cipher.cipher);
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+
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+ crypto_skcipher_set_reqsize(sk,
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+ sizeof(struct skcipher_request) + 32 +
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+ crypto_skcipher_reqsize(ctx->sw_cipher.cipher));
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+ }
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+
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amcc_alg = container_of(alg, struct crypto4xx_alg, alg.u.cipher);
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crypto4xx_ctx_init(amcc_alg, ctx);
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return 0;
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@@ -965,6 +978,8 @@ static void crypto4xx_sk_exit(struct cry
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struct crypto4xx_ctx *ctx = crypto_skcipher_ctx(sk);
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crypto4xx_common_exit(ctx);
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+ if (ctx->sw_cipher.cipher)
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+ crypto_free_skcipher(ctx->sw_cipher.cipher);
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}
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static int crypto4xx_aead_init(struct crypto_aead *tfm)
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@@ -1154,6 +1169,28 @@ static struct crypto4xx_alg_common crypt
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.init = crypto4xx_sk_init,
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.exit = crypto4xx_sk_exit,
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} },
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+ { .type = CRYPTO_ALG_TYPE_SKCIPHER, .u.cipher = {
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+ .base = {
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+ .cra_name = "ctr(aes)",
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+ .cra_driver_name = "ctr-aes-ppc4xx",
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+ .cra_priority = CRYPTO4XX_CRYPTO_PRIORITY,
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+ .cra_flags = CRYPTO_ALG_TYPE_SKCIPHER |
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+ CRYPTO_ALG_NEED_FALLBACK |
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+ CRYPTO_ALG_ASYNC |
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+ CRYPTO_ALG_KERN_DRIVER_ONLY,
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+ .cra_blocksize = AES_BLOCK_SIZE,
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+ .cra_ctxsize = sizeof(struct crypto4xx_ctx),
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+ .cra_module = THIS_MODULE,
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+ },
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+ .min_keysize = AES_MIN_KEY_SIZE,
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+ .max_keysize = AES_MAX_KEY_SIZE,
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+ .ivsize = AES_IV_SIZE,
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+ .setkey = crypto4xx_setkey_aes_ctr,
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+ .encrypt = crypto4xx_encrypt_ctr,
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+ .decrypt = crypto4xx_decrypt_ctr,
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+ .init = crypto4xx_sk_init,
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+ .exit = crypto4xx_sk_exit,
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+ } },
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{ .type = CRYPTO_ALG_TYPE_SKCIPHER, .u.cipher = {
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.base = {
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.cra_name = "rfc3686(ctr(aes))",
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--- a/drivers/crypto/amcc/crypto4xx_core.h
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+++ b/drivers/crypto/amcc/crypto4xx_core.h
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@@ -128,6 +128,7 @@ struct crypto4xx_ctx {
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__le32 iv_nonce;
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u32 sa_len;
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union {
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+ struct crypto_skcipher *cipher;
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struct crypto_aead *aead;
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} sw_cipher;
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};
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@@ -163,12 +164,16 @@ int crypto4xx_setkey_aes_cbc(struct cryp
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const u8 *key, unsigned int keylen);
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int crypto4xx_setkey_aes_cfb(struct crypto_skcipher *cipher,
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const u8 *key, unsigned int keylen);
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+int crypto4xx_setkey_aes_ctr(struct crypto_skcipher *cipher,
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+ const u8 *key, unsigned int keylen);
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int crypto4xx_setkey_aes_ecb(struct crypto_skcipher *cipher,
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const u8 *key, unsigned int keylen);
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int crypto4xx_setkey_aes_ofb(struct crypto_skcipher *cipher,
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const u8 *key, unsigned int keylen);
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int crypto4xx_setkey_rfc3686(struct crypto_skcipher *cipher,
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const u8 *key, unsigned int keylen);
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+int crypto4xx_encrypt_ctr(struct skcipher_request *req);
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+int crypto4xx_decrypt_ctr(struct skcipher_request *req);
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int crypto4xx_encrypt_iv(struct skcipher_request *req);
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int crypto4xx_decrypt_iv(struct skcipher_request *req);
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int crypto4xx_encrypt_noiv(struct skcipher_request *req);
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