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4aa5d3e60d
Add patches for SFP support and package it for ClearFog. Tested with a Juniper SFP module. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Acked-by: Felix Fietkau <nbd@nbd.name>
263 lines
8.3 KiB
Diff
263 lines
8.3 KiB
Diff
From f566177aa6661e646b83526f24391a568ffd1a75 Mon Sep 17 00:00:00 2001
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From: Russell King <rmk+kernel@arm.linux.org.uk>
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Date: Thu, 1 Oct 2015 20:32:07 +0100
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Subject: [PATCH 726/744] phylink: add flow control support
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Add flow control support, including ethtool support, to phylink. We
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add support to allow ethtool to get and set the current flow control
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settings, and the 802.3 specified resolution for the local and remote
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link partner abilities.
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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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---
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drivers/net/phy/phylink.c | 145 +++++++++++++++++++++++++++++++++++++++++-----
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include/linux/phylink.h | 8 +++
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2 files changed, 139 insertions(+), 14 deletions(-)
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--- a/drivers/net/phy/phylink.c
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+++ b/drivers/net/phy/phylink.c
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@@ -91,10 +91,12 @@ static int phylink_parse_fixedlink(struc
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pl->link_config.an_complete = 1;
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pl->link_config.speed = speed;
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pl->link_config.duplex = DUPLEX_HALF;
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- pl->link_config.pause = MLO_PAUSE_NONE;
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if (of_property_read_bool(fixed_node, "full-duplex"))
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pl->link_config.duplex = DUPLEX_FULL;
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+
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+ /* We treat the "pause" and "asym-pause" terminology as
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+ * defining the link partner's ability. */
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if (of_property_read_bool(fixed_node, "pause"))
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pl->link_config.pause |= MLO_PAUSE_SYM;
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if (of_property_read_bool(fixed_node, "asym-pause"))
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@@ -118,7 +120,6 @@ static int phylink_parse_fixedlink(struc
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pl->link_config.duplex = be32_to_cpu(fixed_prop[1]) ?
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DUPLEX_FULL : DUPLEX_HALF;
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pl->link_config.speed = be32_to_cpu(fixed_prop[2]);
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- pl->link_config.pause = MLO_PAUSE_NONE;
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if (be32_to_cpu(fixed_prop[3]))
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pl->link_config.pause |= MLO_PAUSE_SYM;
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if (be32_to_cpu(fixed_prop[4]))
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@@ -130,16 +131,6 @@ static int phylink_parse_fixedlink(struc
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}
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if (pl->link_an_mode == MLO_AN_FIXED) {
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- /* Generate the supported/advertising masks */
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- if (pl->link_config.pause & MLO_PAUSE_SYM) {
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- pl->link_config.supported |= SUPPORTED_Pause;
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- pl->link_config.advertising |= ADVERTISED_Pause;
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- }
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- if (pl->link_config.pause & MLO_PAUSE_ASYM) {
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- pl->link_config.supported |= SUPPORTED_Asym_Pause;
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- pl->link_config.advertising |= ADVERTISED_Asym_Pause;
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- }
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-
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if (pl->link_config.speed > SPEED_1000 &&
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pl->link_config.duplex != DUPLEX_FULL)
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netdev_warn(pl->netdev, "fixed link specifies half duplex for %dMbps link?\n",
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@@ -242,6 +233,56 @@ static void phylink_get_fixed_state(stru
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state->link = !!gpiod_get_value(pl->link_gpio);
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}
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+/* Flow control is resolved according to our and the link partners
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+ * advertisments using the following drawn from the 802.3 specs:
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+ * Local device Link partner
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+ * Pause AsymDir Pause AsymDir Result
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+ * 1 X 1 X TX+RX
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+ * 0 1 1 1 RX
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+ * 1 1 0 1 TX
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+ */
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+static void phylink_resolve_flow(struct phylink *pl,
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+ struct phylink_link_state *state)
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+{
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+ int new_pause = 0;
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+
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+ if (pl->link_config.pause & MLO_PAUSE_AN) {
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+ int pause = 0;
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+
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+ if (pl->link_config.advertising & ADVERTISED_Pause)
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+ pause |= MLO_PAUSE_SYM;
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+ if (pl->link_config.advertising & ADVERTISED_Asym_Pause)
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+ pause |= MLO_PAUSE_ASYM;
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+
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+ pause &= state->pause;
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+
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+ if (pause & MLO_PAUSE_SYM)
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+ new_pause = MLO_PAUSE_TX | MLO_PAUSE_RX;
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+ else if (pause & MLO_PAUSE_ASYM)
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+ new_pause = state->pause & MLO_PAUSE_SYM ?
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+ MLO_PAUSE_RX : MLO_PAUSE_TX;
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+ } else {
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+ new_pause = pl->link_config.pause & MLO_PAUSE_TXRX_MASK;
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+ }
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+
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+ state->pause &= ~MLO_PAUSE_TXRX_MASK;
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+ state->pause |= new_pause;
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+}
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+
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+static const char *phylink_pause_to_str(int pause)
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+{
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+ switch (pause & MLO_PAUSE_TXRX_MASK) {
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+ case MLO_PAUSE_TX | MLO_PAUSE_RX:
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+ return "rx/tx";
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+ case MLO_PAUSE_TX:
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+ return "tx";
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+ case MLO_PAUSE_RX:
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+ return "rx";
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+ default:
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+ return "off";
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+ }
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+}
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+
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extern const char *phy_speed_to_str(int speed);
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static void phylink_resolve(struct work_struct *w)
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@@ -257,6 +298,7 @@ static void phylink_resolve(struct work_
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switch (pl->link_an_mode) {
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case MLO_AN_PHY:
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link_state = pl->phy_state;
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+ phylink_resolve_flow(pl, &link_state);
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break;
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case MLO_AN_FIXED:
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@@ -265,9 +307,12 @@ static void phylink_resolve(struct work_
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case MLO_AN_SGMII:
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phylink_get_mac_state(pl, &link_state);
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- if (pl->phydev)
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+ if (pl->phydev) {
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link_state.link = link_state.link &&
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pl->phy_state.link;
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+ link_state.pause |= pl->phy_state.pause;
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+ phylink_resolve_flow(pl, &link_state);
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+ }
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break;
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case MLO_AN_8023Z:
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@@ -297,7 +342,7 @@ static void phylink_resolve(struct work_
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"Link is Up - %s/%s - flow control %s\n",
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phy_speed_to_str(link_state.speed),
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link_state.duplex ? "Full" : "Half",
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- link_state.pause ? "rx/tx" : "off");
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+ phylink_pause_to_str(link_state.pause));
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}
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}
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mutex_unlock(&pl->state_mutex);
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@@ -326,6 +371,7 @@ struct phylink *phylink_create(struct ne
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pl->link_interface = iface;
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pl->link_port_support = SUPPORTED_MII;
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pl->link_port = PORT_MII;
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+ pl->link_config.pause = MLO_PAUSE_AN;
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pl->ops = ops;
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__set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
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@@ -507,6 +553,7 @@ void phylink_start(struct phylink *pl)
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* a fixed-link to start with the correct parameters, and also
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* ensures that we set the appropriate advertisment for Serdes links.
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*/
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+ phylink_resolve_flow(pl, &pl->link_config);
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phylink_mac_config(pl, &pl->link_config);
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clear_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
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@@ -701,6 +748,76 @@ int phylink_ethtool_nway_reset(struct ph
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}
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EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
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+void phylink_ethtool_get_pauseparam(struct phylink *pl,
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+ struct ethtool_pauseparam *pause)
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+{
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+ mutex_lock(&pl->config_mutex);
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+
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+ pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
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+ pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
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+ pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
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+
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+ mutex_unlock(&pl->config_mutex);
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+}
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+EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
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+
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+static int __phylink_ethtool_set_pauseparam(struct phylink *pl,
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+ struct ethtool_pauseparam *pause)
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+{
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+ struct phylink_link_state *config = &pl->link_config;
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+
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+ if (!(config->supported & (SUPPORTED_Pause | SUPPORTED_Asym_Pause)))
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+ return -EOPNOTSUPP;
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+
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+ if (!(config->supported & SUPPORTED_Asym_Pause) &&
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+ !pause->autoneg && pause->rx_pause != pause->tx_pause)
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+ return -EINVAL;
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+
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+ config->pause &= ~(MLO_PAUSE_AN | MLO_PAUSE_TXRX_MASK);
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+
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+ if (pause->autoneg)
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+ config->pause |= MLO_PAUSE_AN;
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+ if (pause->rx_pause)
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+ config->pause |= MLO_PAUSE_RX;
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+ if (pause->tx_pause)
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+ config->pause |= MLO_PAUSE_TX;
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+
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+ switch (pl->link_an_mode) {
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+ case MLO_AN_PHY:
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+ /* Silently mark the carrier down, and then trigger a resolve */
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+ netif_carrier_off(pl->netdev);
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+ phylink_run_resolve(pl);
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+ break;
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+
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+ case MLO_AN_FIXED:
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+ /* Should we allow fixed links to change against the config? */
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+ phylink_resolve_flow(pl, config);
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+ phylink_mac_config(pl, config);
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+ break;
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+
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+ case MLO_AN_SGMII:
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+ case MLO_AN_8023Z:
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+ phylink_mac_config(pl, config);
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+ phylink_mac_an_restart(pl);
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+ break;
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+ }
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+
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+ return 0;
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+}
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+
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+int phylink_ethtool_set_pauseparam(struct phylink *pl,
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+ struct ethtool_pauseparam *pause)
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+{
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+ int ret;
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+
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+ mutex_lock(&pl->config_mutex);
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+ ret = __phylink_ethtool_set_pauseparam(pl, pause);
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+ mutex_unlock(&pl->config_mutex);
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+
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+ return ret;
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+}
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+EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
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+
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/* This emulates MII registers for a fixed-mode phy operating as per the
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* passed in state. "aneg" defines if we report negotiation is possible.
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*
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--- a/include/linux/phylink.h
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+++ b/include/linux/phylink.h
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@@ -13,6 +13,10 @@ enum {
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MLO_PAUSE_NONE,
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MLO_PAUSE_ASYM = BIT(0),
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MLO_PAUSE_SYM = BIT(1),
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+ MLO_PAUSE_RX = BIT(2),
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+ MLO_PAUSE_TX = BIT(3),
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+ MLO_PAUSE_TXRX_MASK = MLO_PAUSE_TX | MLO_PAUSE_RX,
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+ MLO_PAUSE_AN = BIT(4),
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MLO_AN_PHY = 0,
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MLO_AN_FIXED,
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@@ -66,6 +70,10 @@ void phylink_stop(struct phylink *);
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int phylink_ethtool_get_settings(struct phylink *, struct ethtool_cmd *);
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int phylink_ethtool_set_settings(struct phylink *, struct ethtool_cmd *);
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int phylink_ethtool_nway_reset(struct phylink *);
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+void phylink_ethtool_get_pauseparam(struct phylink *,
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+ struct ethtool_pauseparam *);
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+int phylink_ethtool_set_pauseparam(struct phylink *,
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+ struct ethtool_pauseparam *);
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int phylink_mii_ioctl(struct phylink *, struct ifreq *, int);
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void phylink_set_link_port(struct phylink *pl, u32 support, u8 port);
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