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f02f6aaa8d
Currently, ipq807x only covers Qualcomm IPQ807x SoC-s. However, Qualcomm also has IPQ60xx and IPQ50xx SoC-s under the AX WiSoC-s and they share a lot of stuff with IPQ807x, especially IPQ60xx so to avoid duplicating kernel patches and everything lets make a common target with per SoC subtargets. Start doing that by renaming ipq807x to qualcommax so that dependencies on ipq807x target can be updated. Signed-off-by: Robert Marko <robimarko@gmail.com>
27 lines
957 B
Diff
27 lines
957 B
Diff
From ff7c6533ed8c4de58ed6c8aab03ea59c03eb4f31 Mon Sep 17 00:00:00 2001
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From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
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Date: Sat, 30 Jan 2021 10:50:10 +0530
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Subject: [PATCH] dt-bindings: clock: qcom: Add reset for WCSSAON
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Add binding for WCSSAON reset required for Q6v5 reset on IPQ8074 SoC.
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Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
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Signed-off-by: Sricharan R <sricharan@codeaurora.org>
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Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
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Acked-by: Rob Herring <robh@kernel.org>
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Acked-by: Stephen Boyd <sboyd@kernel.org>
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---
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include/dt-bindings/clock/qcom,gcc-ipq8074.h | 1 +
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1 file changed, 1 insertion(+)
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--- a/include/dt-bindings/clock/qcom,gcc-ipq8074.h
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+++ b/include/dt-bindings/clock/qcom,gcc-ipq8074.h
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@@ -381,6 +381,7 @@
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#define GCC_NSSPORT4_RESET 143
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#define GCC_NSSPORT5_RESET 144
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#define GCC_NSSPORT6_RESET 145
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+#define GCC_WCSSAON_RESET 146
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#define USB0_GDSC 0
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#define USB1_GDSC 1
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