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4b82a20e77
Pick commits adding drivers for audio engine found in MT7986 from Linux 6.6 as well as follow-up fixes from Linux 6.7. Signed-off-by: Maso Huang <maso.huang@mediatek.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
181 lines
5.1 KiB
Diff
181 lines
5.1 KiB
Diff
From d16202eb38585adbc16e32d11188dbc2127015de Mon Sep 17 00:00:00 2001
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From: Maso Huang <maso.huang@mediatek.com>
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Date: Thu, 17 Aug 2023 18:13:38 +0800
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Subject: [PATCH 6/9] ASoC: dt-bindings: mediatek,mt7986-afe: add audio afe
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document
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Add mt7986 audio afe document.
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Signed-off-by: Maso Huang <maso.huang@mediatek.com>
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Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Link: https://lore.kernel.org/r/20230817101338.18782-7-maso.huang@mediatek.com
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Signed-off-by: Mark Brown <broonie@kernel.org>
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---
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.../bindings/sound/mediatek,mt7986-afe.yaml | 160 ++++++++++++++++++
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1 file changed, 160 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/sound/mediatek,mt7986-afe.yaml
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/sound/mediatek,mt7986-afe.yaml
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@@ -0,0 +1,160 @@
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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+%YAML 1.2
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+---
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+$id: http://devicetree.org/schemas/sound/mediatek,mt7986-afe.yaml#
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+$schema: http://devicetree.org/meta-schemas/core.yaml#
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+
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+title: MediaTek AFE PCM controller for MT7986
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+
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+maintainers:
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+ - Maso Huang <maso.huang@mediatek.com>
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+
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+properties:
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+ compatible:
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+ oneOf:
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+ - const: mediatek,mt7986-afe
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+ - items:
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+ - enum:
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+ - mediatek,mt7981-afe
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+ - mediatek,mt7988-afe
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+ - const: mediatek,mt7986-afe
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+
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+ reg:
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+ maxItems: 1
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+
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+ interrupts:
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+ maxItems: 1
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+
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+ clocks:
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+ minItems: 5
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+ items:
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+ - description: audio bus clock
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+ - description: audio 26M clock
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+ - description: audio intbus clock
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+ - description: audio hopping clock
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+ - description: audio pll clock
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+ - description: mux for pcm_mck
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+ - description: audio i2s/pcm mck
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+
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+ clock-names:
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+ minItems: 5
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+ items:
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+ - const: bus_ck
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+ - const: 26m_ck
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+ - const: l_ck
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+ - const: aud_ck
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+ - const: eg2_ck
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+ - const: sel
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+ - const: i2s_m
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+
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+required:
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+ - compatible
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+ - reg
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+ - interrupts
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+ - clocks
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+ - clock-names
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+
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+allOf:
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+ - if:
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+ properties:
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+ compatible:
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+ contains:
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+ const: mediatek,mt7986-afe
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+ then:
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+ properties:
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+ clocks:
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+ items:
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+ - description: audio bus clock
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+ - description: audio 26M clock
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+ - description: audio intbus clock
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+ - description: audio hopping clock
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+ - description: audio pll clock
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+ clock-names:
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+ items:
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+ - const: bus_ck
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+ - const: 26m_ck
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+ - const: l_ck
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+ - const: aud_ck
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+ - const: eg2_ck
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+
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+ - if:
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+ properties:
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+ compatible:
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+ contains:
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+ const: mediatek,mt7981-afe
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+ then:
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+ properties:
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+ clocks:
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+ items:
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+ - description: audio bus clock
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+ - description: audio 26M clock
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+ - description: audio intbus clock
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+ - description: audio hopping clock
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+ - description: audio pll clock
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+ - description: mux for pcm_mck
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+ clock-names:
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+ items:
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+ - const: bus_ck
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+ - const: 26m_ck
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+ - const: l_ck
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+ - const: aud_ck
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+ - const: eg2_ck
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+ - const: sel
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+
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+ - if:
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+ properties:
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+ compatible:
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+ contains:
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+ const: mediatek,mt7988-afe
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+ then:
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+ properties:
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+ clocks:
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+ items:
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+ - description: audio bus clock
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+ - description: audio 26M clock
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+ - description: audio intbus clock
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+ - description: audio hopping clock
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+ - description: audio pll clock
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+ - description: mux for pcm_mck
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+ - description: audio i2s/pcm mck
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+ clock-names:
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+ items:
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+ - const: bus_ck
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+ - const: 26m_ck
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+ - const: l_ck
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+ - const: aud_ck
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+ - const: eg2_ck
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+ - const: sel
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+ - const: i2s_m
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+
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+additionalProperties: false
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+
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+examples:
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+ - |
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+ #include <dt-bindings/interrupt-controller/arm-gic.h>
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+ #include <dt-bindings/interrupt-controller/irq.h>
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+ #include <dt-bindings/clock/mt7986-clk.h>
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+
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+ afe@11210000 {
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+ compatible = "mediatek,mt7986-afe";
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+ reg = <0x11210000 0x9000>;
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+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&infracfg_ao CLK_INFRA_AUD_BUS_CK>,
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+ <&infracfg_ao CLK_INFRA_AUD_26M_CK>,
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+ <&infracfg_ao CLK_INFRA_AUD_L_CK>,
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+ <&infracfg_ao CLK_INFRA_AUD_AUD_CK>,
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+ <&infracfg_ao CLK_INFRA_AUD_EG2_CK>;
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+ clock-names = "bus_ck",
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+ "26m_ck",
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+ "l_ck",
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+ "aud_ck",
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+ "eg2_ck";
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+ assigned-clocks = <&topckgen CLK_TOP_A1SYS_SEL>,
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+ <&topckgen CLK_TOP_AUD_L_SEL>,
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+ <&topckgen CLK_TOP_A_TUNER_SEL>;
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+ assigned-clock-parents = <&topckgen CLK_TOP_APLL2_D4>,
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+ <&apmixedsys CLK_APMIXED_APLL2>,
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+ <&topckgen CLK_TOP_APLL2_D4>;
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+ };
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+
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+...
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