mirror of
https://github.com/openwrt/openwrt.git
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b4c02c9998
Removed upstreamed patches:
generic/pending-5.4
445-mtd-spinand-gigadevice-Only-one-dummy-byte-in-QUA.patch
446-mtd-spinand-gigadevice-Add-QE-Bit.patch
pistachio/patches-5.4
150-pwm-img-Fix-null-pointer-access-in-probe.patch
Manually rebased:
layerscape/patches-5.4
801-audio-0011-Revert-ASoC-fsl_sai-add-of_match-data.patch
801-audio-0039-MLK-16224-6-ASoC-fsl_sai-fix-DSD-suspend-resume.patch
801-audio-0073-MLK-21957-3-ASoC-fsl_sai-add-bitcount-and-timestamp-.patch
820-usb-0009-usb-dwc3-Add-workaround-for-host-mode-VBUS-glitch-wh.patch
All modifications made by update_kernel.sh
Build system: x86_64
Build-tested: ipq806x/R7800, ath79/generic, bcm27xx/bcm2711,
mvebu (mamba, rango), x86_64, ramips/mt7621
Run-tested: ipq806x/R7800, mvebu (mamba, rango), x86_64, ramips (RT-AC57U)
No dmesg regressions, everything functional
Signed-off-by: John Audia <graysky@archlinux.us>
[alter 820-usb-0009-usb-dwc3-Add-workaround-for-host-mode-VBUS-glitch-wh]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
165 lines
5.3 KiB
Diff
165 lines
5.3 KiB
Diff
From 599235bd9d22c8cad90b0a7621b46d70cca94d31 Mon Sep 17 00:00:00 2001
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From: Viorel Suman <viorel.suman@nxp.com>
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Date: Wed, 5 Jun 2019 13:46:32 +0000
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Subject: [PATCH] MLK-21957-3: ASoC: fsl_sai: add bitcount and timestamp
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controls
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Bitcount and timestamp support added in SAI IP recently.
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Add the related controls in SAI driver.
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Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
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---
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sound/soc/fsl/fsl_sai.c | 97 ++++++++++++++++++++++++++++++++++++++++++++++++-
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sound/soc/fsl/fsl_sai.h | 6 +++
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2 files changed, 102 insertions(+), 1 deletion(-)
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--- a/sound/soc/fsl/fsl_sai.c
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+++ b/sound/soc/fsl/fsl_sai.c
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@@ -992,6 +992,90 @@ static const struct snd_soc_dai_ops fsl_
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.shutdown = fsl_sai_shutdown,
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};
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+static const char
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+ *en_sl[] = { "Disabled", "Enabled", },
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+ *inc_sl[] = { "On enabled and bitcount increment", "On enabled", };
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+
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+static const struct soc_enum tstmp_enum[] = {
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+SOC_ENUM_SINGLE(FSL_SAI_TTCTL, 0, ARRAY_SIZE(en_sl), en_sl),
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+SOC_ENUM_SINGLE(FSL_SAI_RTCTL, 0, ARRAY_SIZE(en_sl), en_sl),
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+SOC_ENUM_SINGLE(FSL_SAI_TTCTL, 1, ARRAY_SIZE(inc_sl), inc_sl),
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+SOC_ENUM_SINGLE(FSL_SAI_RTCTL, 1, ARRAY_SIZE(inc_sl), inc_sl),
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+};
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+
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+int fsl_sai_get_reg(struct snd_kcontrol *kcontrol,
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+ struct snd_ctl_elem_value *ucontrol)
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+{
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+ struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
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+ struct soc_mreg_control *mc =
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+ (struct soc_mreg_control *)kcontrol->private_value;
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+ bool pm_active = pm_runtime_active(component->dev);
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+ unsigned int regval;
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+ int ret;
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+
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+ if (pm_active)
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+ regcache_cache_bypass(component->regmap, true);
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+
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+ ret = snd_soc_component_read(component, mc->regbase, ®val);
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+
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+ if (pm_active)
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+ regcache_cache_bypass(component->regmap, false);
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+
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+ if (ret < 0)
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+ return ret;
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+
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+ ucontrol->value.integer.value[0] = regval;
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+
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+ return 0;
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+}
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+
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+#define SOC_SINGLE_REG_RO(xname, xreg) \
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+{ .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = (xname), \
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+ .access = SNDRV_CTL_ELEM_ACCESS_READ | \
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+ SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
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+ .info = snd_soc_info_xr_sx, .get = fsl_sai_get_reg, \
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+ .private_value = (unsigned long)&(struct soc_mreg_control) \
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+ { .regbase = xreg, .regcount = 1, .nbits = 32, \
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+ .invert = 0, .min = 0, .max = 0xffffffff, } }
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+
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+static const struct snd_kcontrol_new fsl_sai_pb_ctrls[] = {
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+ SOC_ENUM("Playback Timestamp Control", tstmp_enum[0]),
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+ SOC_ENUM("Playback Timestamp Increment", tstmp_enum[2]),
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+ SOC_SINGLE("Playback Timestamp Reset", FSL_SAI_TTCTL, 8, 1, 0),
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+ SOC_SINGLE("Playback Bit Counter Reset", FSL_SAI_TTCTL, 9, 1, 0),
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+ SOC_SINGLE_REG_RO("Playback Timestamp Counter", FSL_SAI_TTCTN),
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+ SOC_SINGLE_REG_RO("Playback Bit Counter", FSL_SAI_TBCTN),
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+ SOC_SINGLE_REG_RO("Playback Latched Timestamp Counter", FSL_SAI_TTCAP),
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+};
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+
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+static const struct snd_kcontrol_new fsl_sai_cp_ctrls[] = {
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+ SOC_ENUM("Capture Timestamp Control", tstmp_enum[1]),
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+ SOC_ENUM("Capture Timestamp Increment", tstmp_enum[3]),
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+ SOC_SINGLE("Capture Timestamp Reset", FSL_SAI_RTCTL, 8, 1, 0),
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+ SOC_SINGLE("Capture Bit Counter Reset", FSL_SAI_RTCTL, 9, 1, 0),
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+ SOC_SINGLE_REG_RO("Capture Timestamp Counter", FSL_SAI_RTCTN),
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+ SOC_SINGLE_REG_RO("Capture Bit Counter", FSL_SAI_RBCTN),
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+ SOC_SINGLE_REG_RO("Capture Latched Timestamp Counter", FSL_SAI_RTCAP),
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+};
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+
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+static int fsl_sai_pcm_new(struct snd_soc_pcm_runtime *rtd,
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+ struct snd_soc_dai *dai)
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+{
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+ struct fsl_sai *sai = dev_get_drvdata(dai->dev);
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+ struct snd_pcm *pcm = rtd->pcm;
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+ bool ts_enabled = sai->verid.timestamp_en;
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+ struct snd_soc_component *comp = dai->component;
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+
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+ if (ts_enabled && pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream)
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+ snd_soc_add_component_controls(comp, fsl_sai_pb_ctrls,
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+ ARRAY_SIZE(fsl_sai_pb_ctrls));
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+
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+ if (ts_enabled && pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream)
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+ snd_soc_add_component_controls(comp, fsl_sai_cp_ctrls,
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+ ARRAY_SIZE(fsl_sai_cp_ctrls));
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+ return 0;
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+}
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+
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static int fsl_sai_dai_probe(struct snd_soc_dai *cpu_dai)
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{
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struct fsl_sai *sai = dev_get_drvdata(cpu_dai->dev);
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@@ -1030,6 +1114,7 @@ static int fsl_sai_dai_resume(struct snd
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}
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static struct snd_soc_dai_driver fsl_sai_dai_template = {
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+ .pcm_new = fsl_sai_pcm_new,
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.probe = fsl_sai_dai_probe,
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.playback = {
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.stream_name = "CPU-Playback",
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@@ -1054,7 +1139,7 @@ static struct snd_soc_dai_driver fsl_sai
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};
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static const struct snd_soc_component_driver fsl_component = {
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- .name = "fsl-sai",
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+ .name = "fsl-sai",
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};
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static struct reg_default fsl_sai_v2_reg_defaults[] = {
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@@ -1141,6 +1226,14 @@ static bool fsl_sai_readable_reg(struct
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case FSL_SAI_MDIV:
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case FSL_SAI_VERID:
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case FSL_SAI_PARAM:
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+ case FSL_SAI_TTCTN:
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+ case FSL_SAI_RTCTN:
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+ case FSL_SAI_TTCTL:
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+ case FSL_SAI_TBCTN:
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+ case FSL_SAI_TTCAP:
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+ case FSL_SAI_RTCTL:
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+ case FSL_SAI_RBCTN:
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+ case FSL_SAI_RTCAP:
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return true;
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default:
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return false;
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@@ -1214,6 +1307,8 @@ static bool fsl_sai_writeable_reg(struct
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case FSL_SAI_RMR:
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case FSL_SAI_MCTL:
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case FSL_SAI_MDIV:
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+ case FSL_SAI_TTCTL:
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+ case FSL_SAI_RTCTL:
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return true;
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default:
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return false;
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--- a/sound/soc/fsl/fsl_sai.h
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+++ b/sound/soc/fsl/fsl_sai.h
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@@ -210,6 +210,12 @@
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#define SAI_FLAG_PMQOS BIT(0)
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+/* SAI timestamp and bitcounter */
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+#define FSL_SAI_xTCTL_TSEN BIT(0)
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+#define FSL_SAI_xTCTL_TSINC BIT(1)
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+#define FSL_SAI_xTCTL_RTSC BIT(8)
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+#define FSL_SAI_xTCTL_RBC BIT(9)
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+
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struct fsl_sai_soc_data {
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unsigned int fifo_depth;
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unsigned int fifos;
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