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b357564463
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.1.57 Manually rebased: generic/pending-6.1/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch Removed upstreamed: qualcommax/patches-6.1/0134-PCI-qcom-Fixing-broken-pcie-enumeration-for-2_3_3-co.patch[1] All other patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.57&id=2dfb5f324d799f4545e17631415aba6d302a8e2b Build system: x86/64 Build-tested: x86/64/AMD Cezanne Run-tested: x86/64/AMD Cezanne Reviewed-by: Robert Marko <robimarko@gmail.com> Signed-off-by: John Audia <therealgraysky@proton.me>
111 lines
4.1 KiB
Diff
111 lines
4.1 KiB
Diff
From cef945452c8468efce75ba0dc8420510a5b84af9 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alexis=20Lothor=C3=A9?= <alexis.lothore@bootlin.com>
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Date: Mon, 29 May 2023 10:02:45 +0200
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Subject: [PATCH 5/6] net: dsa: mv88e6xxx: pass mv88e6xxx_chip structure to
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port_max_speed_mode
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Some switches families have minor differences on supported link speed for
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ports. Instead of redefining a new port_max_speed_mode for each different
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configuration, allow to pass mv88e6xxx_chip structure to allow
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differentiating those chips by known chip id
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Signed-off-by: Alexis Lothoré <alexis.lothore@bootlin.com>
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Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/dsa/mv88e6xxx/chip.c | 2 +-
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drivers/net/dsa/mv88e6xxx/chip.h | 3 ++-
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drivers/net/dsa/mv88e6xxx/port.c | 12 ++++++++----
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drivers/net/dsa/mv88e6xxx/port.h | 12 ++++++++----
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4 files changed, 19 insertions(+), 10 deletions(-)
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--- a/drivers/net/dsa/mv88e6xxx/chip.c
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+++ b/drivers/net/dsa/mv88e6xxx/chip.c
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@@ -3328,7 +3328,7 @@ static int mv88e6xxx_setup_port(struct m
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caps = pl_config.mac_capabilities;
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if (chip->info->ops->port_max_speed_mode)
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- mode = chip->info->ops->port_max_speed_mode(port);
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+ mode = chip->info->ops->port_max_speed_mode(chip, port);
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else
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mode = PHY_INTERFACE_MODE_NA;
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--- a/drivers/net/dsa/mv88e6xxx/chip.h
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+++ b/drivers/net/dsa/mv88e6xxx/chip.h
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@@ -508,7 +508,8 @@ struct mv88e6xxx_ops {
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int speed, int duplex);
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/* What interface mode should be used for maximum speed? */
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- phy_interface_t (*port_max_speed_mode)(int port);
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+ phy_interface_t (*port_max_speed_mode)(struct mv88e6xxx_chip *chip,
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+ int port);
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int (*port_tag_remap)(struct mv88e6xxx_chip *chip, int port);
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--- a/drivers/net/dsa/mv88e6xxx/port.c
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+++ b/drivers/net/dsa/mv88e6xxx/port.c
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@@ -342,7 +342,8 @@ int mv88e6341_port_set_speed_duplex(stru
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duplex);
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}
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-phy_interface_t mv88e6341_port_max_speed_mode(int port)
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+phy_interface_t mv88e6341_port_max_speed_mode(struct mv88e6xxx_chip *chip,
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+ int port)
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{
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if (port == 5)
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return PHY_INTERFACE_MODE_2500BASEX;
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@@ -381,7 +382,8 @@ int mv88e6390_port_set_speed_duplex(stru
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duplex);
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}
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-phy_interface_t mv88e6390_port_max_speed_mode(int port)
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+phy_interface_t mv88e6390_port_max_speed_mode(struct mv88e6xxx_chip *chip,
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+ int port)
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{
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if (port == 9 || port == 10)
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return PHY_INTERFACE_MODE_2500BASEX;
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@@ -403,7 +405,8 @@ int mv88e6390x_port_set_speed_duplex(str
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duplex);
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}
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-phy_interface_t mv88e6390x_port_max_speed_mode(int port)
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+phy_interface_t mv88e6390x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
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+ int port)
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{
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if (port == 9 || port == 10)
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return PHY_INTERFACE_MODE_XAUI;
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@@ -500,7 +503,8 @@ int mv88e6393x_port_set_speed_duplex(str
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return 0;
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}
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-phy_interface_t mv88e6393x_port_max_speed_mode(int port)
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+phy_interface_t mv88e6393x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
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+ int port)
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{
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if (port == 0 || port == 9 || port == 10)
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return PHY_INTERFACE_MODE_10GBASER;
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--- a/drivers/net/dsa/mv88e6xxx/port.h
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+++ b/drivers/net/dsa/mv88e6xxx/port.h
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@@ -359,10 +359,14 @@ int mv88e6390x_port_set_speed_duplex(str
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int mv88e6393x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
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int speed, int duplex);
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-phy_interface_t mv88e6341_port_max_speed_mode(int port);
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-phy_interface_t mv88e6390_port_max_speed_mode(int port);
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-phy_interface_t mv88e6390x_port_max_speed_mode(int port);
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-phy_interface_t mv88e6393x_port_max_speed_mode(int port);
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+phy_interface_t mv88e6341_port_max_speed_mode(struct mv88e6xxx_chip *chip,
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+ int port);
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+phy_interface_t mv88e6390_port_max_speed_mode(struct mv88e6xxx_chip *chip,
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+ int port);
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+phy_interface_t mv88e6390x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
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+ int port);
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+phy_interface_t mv88e6393x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
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+ int port);
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int mv88e6xxx_port_set_state(struct mv88e6xxx_chip *chip, int port, u8 state);
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