mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-23 15:32:33 +00:00
24de7c29e5
Backport below changes for I2C QUP driver from v4.17: 0668bc44a426 i2c: qup: fix copyrights and update to SPDX identifier 7239872fb340 i2c: qup: fixed releasing dma without flush operation completion eb422b539c1f i2c: qup: minor code reorganization for use_dma 6d5f37f166bb i2c: qup: remove redundant variables for BAM SG count c5adc0fa63a9 i2c: qup: schedule EOT and FLUSH tags at the end of transfer 7e6c35fe602d i2c: qup: fix the transfer length for BAM RX EOT FLUSH tags 3f450d3eea14 i2c: qup: proper error handling for i2c error in BAM mode 08f15963bc75 i2c: qup: use the complete transfer length to choose DMA mode ecb6e1e5f435 i2c: qup: change completion timeout according to transfer length 6f2f0f6465ac i2c: qup: fix buffer overflow for multiple msg of maximum xfer len f7714b4e451b i2c: qup: send NACK for last read sub transfers fbfab1ab0658 i2c: qup: reorganization of driver code to remove polling for qup v1 7545c7dba169 i2c: qup: reorganization of driver code to remove polling for qup v2 This fixes various I2C issues observed on AP120C-AC board equipped with Atmel/Microchip AT97SC3205T TPM module. Tested-by: Christian Lamparter <chunkeey@gmail.com> Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
62 lines
2.0 KiB
Diff
62 lines
2.0 KiB
Diff
From ecb6e1e5f4352055a5761b945a833a925d51bf8d Mon Sep 17 00:00:00 2001
|
|
From: Abhishek Sahu <absahu@codeaurora.org>
|
|
Date: Mon, 12 Mar 2018 18:44:58 +0530
|
|
Subject: [PATCH 09/13] i2c: qup: change completion timeout according to
|
|
transfer length
|
|
|
|
Currently the completion timeout is being taken according to
|
|
maximum transfer length which is too high if SCL is operating in
|
|
high frequency. This patch calculates timeout on the basis of
|
|
one-byte transfer time and uses the same for completion timeout.
|
|
|
|
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
|
|
Reviewed-by: Andy Gross <andy.gross@linaro.org>
|
|
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
|
|
---
|
|
drivers/i2c/busses/i2c-qup.c | 13 ++++++++++---
|
|
1 file changed, 10 insertions(+), 3 deletions(-)
|
|
|
|
--- a/drivers/i2c/busses/i2c-qup.c
|
|
+++ b/drivers/i2c/busses/i2c-qup.c
|
|
@@ -121,8 +121,12 @@
|
|
#define MX_TX_RX_LEN SZ_64K
|
|
#define MX_BLOCKS (MX_TX_RX_LEN / QUP_READ_LIMIT)
|
|
|
|
-/* Max timeout in ms for 32k bytes */
|
|
-#define TOUT_MAX 300
|
|
+/*
|
|
+ * Minimum transfer timeout for i2c transfers in seconds. It will be added on
|
|
+ * the top of maximum transfer time calculated from i2c bus speed to compensate
|
|
+ * the overheads.
|
|
+ */
|
|
+#define TOUT_MIN 2
|
|
|
|
/* Default values. Use these if FW query fails */
|
|
#define DEFAULT_CLK_FREQ 100000
|
|
@@ -163,6 +167,7 @@ struct qup_i2c_dev {
|
|
int in_blk_sz;
|
|
|
|
unsigned long one_byte_t;
|
|
+ unsigned long xfer_timeout;
|
|
struct qup_i2c_block blk;
|
|
|
|
struct i2c_msg *msg;
|
|
@@ -849,7 +854,7 @@ static int qup_i2c_bam_do_xfer(struct qu
|
|
dma_async_issue_pending(qup->brx.dma);
|
|
}
|
|
|
|
- if (!wait_for_completion_timeout(&qup->xfer, TOUT_MAX * HZ)) {
|
|
+ if (!wait_for_completion_timeout(&qup->xfer, qup->xfer_timeout)) {
|
|
dev_err(qup->dev, "normal trans timed out\n");
|
|
ret = -ETIMEDOUT;
|
|
}
|
|
@@ -1605,6 +1610,8 @@ nodma:
|
|
*/
|
|
one_bit_t = (USEC_PER_SEC / clk_freq) + 1;
|
|
qup->one_byte_t = one_bit_t * 9;
|
|
+ qup->xfer_timeout = TOUT_MIN * HZ +
|
|
+ usecs_to_jiffies(MX_TX_RX_LEN * qup->one_byte_t);
|
|
|
|
dev_dbg(qup->dev, "IN:block:%d, fifo:%d, OUT:block:%d, fifo:%d\n",
|
|
qup->in_blk_sz, qup->in_fifo_sz,
|