openwrt/target/linux/mediatek/dts/mt7981b-cudy-re3000-v1.dts
Robert Senderek 6f70e09a00 mediatek: filogic: add support for Cudy RE3000 v1
MT7981B /256MB /16MB SPI (XM25QH128C)
AX 2.4Ghz
AX 5Ghz 160Mhz wide
1Gbit LAN

OEM:
root@RE3000:~# ifconfig |grep HWaddr
br-lan    Link encap:Ethernet  HWaddr 80:XX:XX:08:XX:X0 (label)
br-wan    Link encap:Ethernet  HWaddr 80:XX:XX:08:XX:X0
eth0      Link encap:Ethernet  HWaddr 80:XX:XX:08:XX:X0
ra0       Link encap:Ethernet  HWaddr 80:XX:XX:08:XX:X0
ra2       Link encap:Ethernet  HWaddr 82:XX:XX:28:XX:X0
rax0      Link encap:Ethernet  HWaddr 82:XX:XX:38:XX:X0
rax2      Link encap:Ethernet  HWaddr 82:XX:XX:58:XX:X0

OpenWrt
root@OpenWrt:/# ifconfig |grep HW
br-lan    Link encap:Ethernet  HWaddr 80:XX:XX:08:XX:X0
eth0      Link encap:Ethernet  HWaddr 80:XX:XX:08:XX:X0
phy0-ap0  Link encap:Ethernet  HWaddr 80:XX:XX:08:XX:X0
phy1-ap0  Link encap:Ethernet  HWaddr 82:XX:XX:08:XX:X1

 tftp Installation via u-boot:

Connect TTL3.3V converter
connector is under the radiator Set speed 115200 8 N 1
Interrupt boot process by holding down-arrow key during boot then
>> 6. Load image
>> 0 - TFTP client (Default)
enter IP adresses and initramfs-kernel.bin

write to flash via sysupgrade or gui

Signed-off-by: Robert Senderek <robert.senderek@10g.pl>
(cherry picked from commit e8f7597317)
2024-03-07 22:14:32 +01:00

222 lines
3.7 KiB
Plaintext

// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "mt7981.dtsi"
/ {
model = "Cudy RE3000 v1";
compatible = "cudy,re3000-v1", "mediatek,mt7981";
aliases {
serial0 = &uart0;
label-mac-device = &gmac1;
led-boot = &led_status;
led-failsafe = &led_status;
led-running = &led_status;
led-upgrade = &led_status;
};
chosen {
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led_status: led@0 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_WHITE>;
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
};
led@1 {
label = "red:wifi5";
gpios = <&pio 7 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
led@2 {
label = "white:wifi2";
gpios = <&pio 6 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
led@3 {
function = LED_FUNCTION_LAN;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
};
led@4 {
function = LED_FUNCTION_WPS;
color = <LED_COLOR_ID_WHITE>;
gpios = <&pio 11 GPIO_ACTIVE_LOW>;
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
status = "okay";
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "gmii";
phy-handle = <&int_gbe_phy>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_bdinfo_de00 0>;
};
};
&mdio_bus {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
};
};
&spi0 {
status = "disabled";
};
&spi2 {
pinctrl-names = "default";
pinctrl-0 = <&spi2_flash_pins>;
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@00000 {
label = "BL2";
reg = <0x00000 0x40000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x40000 0x10000>;
read-only;
};
factory: partition@50000 {
label = "Factory";
reg = <0x50000 0x10000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
};
};
bdinfo: partition@60000 {
label = "bdinfo";
reg = <0x60000 0x10000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_bdinfo_de00: macaddr@de00 {
compatible = "mac-base";
reg = <0xde00 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@70000 {
label = "FIP";
reg = <0x70000 0x80000>;
read-only;
};
partition@f0000 {
compatible = "denx,fit";
label = "firmware";
reg = <0xf0000 0xf10000>;
};
};
};
};
&pio {
spi2_flash_pins: spi2-pins {
mux {
function = "spi";
groups = "spi2", "spi2_wp_hold";
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
bias-pull-up = <103>;
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
bias-pull-down = <103>;
};
};
};
&wifi {
status = "okay";
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};