mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-22 15:02:32 +00:00
f07e572f64
bcm2708: boot tested on RPi B+ v1.2 bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G bcm2710: boot tested on RPi 3B v1.2 bcm2711: boot tested on RPi 4B v1.1 4G Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
108 lines
3.2 KiB
Diff
108 lines
3.2 KiB
Diff
From b1d33d1e5a44afd2025c5a44a85dc2fab00ec6a7 Mon Sep 17 00:00:00 2001
|
|
From: popcornmix <popcornmix@gmail.com>
|
|
Date: Tue, 5 Nov 2019 11:28:19 +0000
|
|
Subject: [PATCH] Revert "pinctrl: bcm2835: Pass irqchip when adding
|
|
gpiochip"
|
|
|
|
This reverts commit 73345a18d464b1b945b29f54f630ace6873344e2.
|
|
---
|
|
drivers/pinctrl/bcm/pinctrl-bcm2835.c | 55 +++++++++++++++------------
|
|
1 file changed, 30 insertions(+), 25 deletions(-)
|
|
|
|
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
|
|
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
|
|
@@ -78,6 +78,7 @@
|
|
struct bcm2835_pinctrl {
|
|
struct device *dev;
|
|
void __iomem *base;
|
|
+ int irq[BCM2835_NUM_IRQS];
|
|
|
|
/* note: locking assumes each bank will have its own unsigned long */
|
|
unsigned long enabled_irq_map[BCM2835_NUM_BANKS];
|
|
@@ -381,14 +382,14 @@ static void bcm2835_gpio_irq_handler(str
|
|
int group;
|
|
int i;
|
|
|
|
- for (i = 0; i < BCM2835_NUM_IRQS; i++) {
|
|
- if (chip->irq.parents[i] == irq) {
|
|
+ for (i = 0; i < ARRAY_SIZE(pc->irq); i++) {
|
|
+ if (pc->irq[i] == irq) {
|
|
group = i;
|
|
break;
|
|
}
|
|
}
|
|
/* This should not happen, every IRQ has a bank */
|
|
- if (i == BCM2835_NUM_IRQS)
|
|
+ if (i == ARRAY_SIZE(pc->irq))
|
|
BUG();
|
|
|
|
chained_irq_enter(host_chip, desc);
|
|
@@ -1086,7 +1087,6 @@ static int bcm2835_pinctrl_probe(struct
|
|
struct device *dev = &pdev->dev;
|
|
struct device_node *np = dev->of_node;
|
|
struct bcm2835_pinctrl *pc;
|
|
- struct gpio_irq_chip *girq;
|
|
struct resource iomem;
|
|
int err, i;
|
|
const struct of_device_id *match;
|
|
@@ -1135,33 +1135,38 @@ static int bcm2835_pinctrl_probe(struct
|
|
raw_spin_lock_init(&pc->irq_lock[i]);
|
|
}
|
|
|
|
- girq = &pc->gpio_chip.irq;
|
|
- girq->chip = &bcm2835_gpio_irq_chip;
|
|
- girq->parent_handler = bcm2835_gpio_irq_handler;
|
|
- girq->num_parents = BCM2835_NUM_IRQS;
|
|
- girq->parents = devm_kcalloc(dev, BCM2835_NUM_IRQS,
|
|
- sizeof(*girq->parents),
|
|
- GFP_KERNEL);
|
|
- if (!girq->parents)
|
|
- return -ENOMEM;
|
|
- /*
|
|
- * Use the same handler for all groups: this is necessary
|
|
- * since we use one gpiochip to cover all lines - the
|
|
- * irq handler then needs to figure out which group and
|
|
- * bank that was firing the IRQ and look up the per-group
|
|
- * and bank data.
|
|
- */
|
|
- for (i = 0; i < BCM2835_NUM_IRQS; i++)
|
|
- girq->parents[i] = irq_of_parse_and_map(np, i);
|
|
- girq->default_type = IRQ_TYPE_NONE;
|
|
- girq->handler = handle_level_irq;
|
|
-
|
|
err = gpiochip_add_data(&pc->gpio_chip, pc);
|
|
if (err) {
|
|
dev_err(dev, "could not add GPIO chip\n");
|
|
return err;
|
|
}
|
|
|
|
+ err = gpiochip_irqchip_add(&pc->gpio_chip, &bcm2835_gpio_irq_chip,
|
|
+ 0, handle_level_irq, IRQ_TYPE_NONE);
|
|
+ if (err) {
|
|
+ dev_info(dev, "could not add irqchip\n");
|
|
+ return err;
|
|
+ }
|
|
+
|
|
+ for (i = 0; i < BCM2835_NUM_IRQS; i++) {
|
|
+ pc->irq[i] = irq_of_parse_and_map(np, i);
|
|
+
|
|
+ if (pc->irq[i] == 0)
|
|
+ continue;
|
|
+
|
|
+ /*
|
|
+ * Use the same handler for all groups: this is necessary
|
|
+ * since we use one gpiochip to cover all lines - the
|
|
+ * irq handler then needs to figure out which group and
|
|
+ * bank that was firing the IRQ and look up the per-group
|
|
+ * and bank data.
|
|
+ */
|
|
+ gpiochip_set_chained_irqchip(&pc->gpio_chip,
|
|
+ &bcm2835_gpio_irq_chip,
|
|
+ pc->irq[i],
|
|
+ bcm2835_gpio_irq_handler);
|
|
+ }
|
|
+
|
|
match = of_match_node(bcm2835_pinctrl_match, pdev->dev.of_node);
|
|
if (match) {
|
|
bcm2835_pinctrl_desc.confops =
|