mirror of
https://github.com/openwrt/openwrt.git
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106 lines
3.2 KiB
Diff
106 lines
3.2 KiB
Diff
diff -Nru linux-2.6.19.2/arch/mips/Kconfig linux-ar7/arch/mips/Kconfig
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--- linux-2.6.19.2/arch/mips/Kconfig 2006-12-12 02:32:53.000000000 +0700
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+++ linux-ar7/arch/mips/Kconfig 2007-01-29 21:52:21.000000000 +0700
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@@ -16,6 +16,20 @@
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prompt "System type"
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default SGI_IP22
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+config AR7
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+ bool "Texas Instruments AR7"
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+ select BOOT_ELF32
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+ select DMA_NONCOHERENT
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+ select HW_HAS_PCI
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+ select IRQ_CPU
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+ select SWAP_IO_SPACE
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+ select SYS_HAS_CPU_MIPS32_R1
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+ select SYS_HAS_EARLY_PRINTK
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+ select SYS_SUPPORTS_32BIT_KERNEL
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+ select SYS_SUPPORTS_LITTLE_ENDIAN
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+ select NEED_MULTIPLE_NODES
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+ select GENERIC_GPIO
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+
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config MIPS_MTX1
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bool "4G Systems MTX-1 board"
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select DMA_NONCOHERENT
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diff -Nru linux-2.6.19.2/arch/mips/Makefile linux-ar7/arch/mips/Makefile
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--- linux-2.6.19.2/arch/mips/Makefile 2006-12-12 02:32:53.000000000 +0700
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+++ linux-ar7/arch/mips/Makefile 2007-01-29 21:52:21.000000000 +0700
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@@ -158,6 +158,13 @@
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#
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#
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+# Texas Instruments AR7
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+#
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+core-$(CONFIG_AR7) += arch/mips/ar7/
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+cflags-$(CONFIG_AR7) += -Iinclude/asm-mips/ar7
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+load-$(CONFIG_AR7) += 0xffffffff94100000
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+
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+#
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# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
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#
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core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
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diff -Nru linux-2.6.19.2/arch/mips/kernel/setup.c linux-ar7/arch/mips/kernel/setup.c
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--- linux-2.6.19.2orig/arch/mips/kernel/setup.c 2006-12-12 02:32:53.000000000 +0700
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+++ linux-ar7/arch/mips/kernel/setup.c 2007-03-04 22:32:13.000000000 +0700
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@@ -236,7 +236,7 @@
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* Initialize the bootmem allocator. It also setup initrd related data
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* if needed.
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*/
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-#ifdef CONFIG_SGI_IP27
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+#ifdef CONFIG_NEED_MULTIPLE_NODES
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static void __init bootmem_init(void)
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{
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@@ -244,7 +244,7 @@
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finalize_initrd();
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}
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-#else /* !CONFIG_SGI_IP27 */
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+#else /* !CONFIG_NEED_MULTIPLE_NODES */
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static void __init bootmem_init(void)
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{
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@@ -349,7 +349,7 @@
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finalize_initrd();
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}
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-#endif /* CONFIG_SGI_IP27 */
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+#endif /* CONFIG_NEED_MULTIPLE_NODES */
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/*
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* arch_mem_init - initialize memory managment subsystem
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diff -Nru linux-2.6.19.2/arch/mips/kernel/traps.c linux-ar7/arch/mips/kernel/traps.c
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--- linux-2.6.19.2/arch/mips/kernel/traps.c 2007-01-11 02:10:37.000000000 +0700
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+++ linux-ar7/arch/mips/kernel/traps.c 2007-03-15 13:19:19.000000000 +0700
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@@ -1072,11 +1072,6 @@
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unsigned long exception_handlers[32];
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unsigned long vi_handlers[64];
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-/*
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- * As a side effect of the way this is implemented we're limited
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- * to interrupt handlers in the address range from
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- * KSEG0 <= x < KSEG0 + 256mb on the Nevada. Oh well ...
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- */
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void *set_except_vector(int n, void *addr)
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{
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unsigned long handler = (unsigned long) addr;
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@@ -1084,9 +1079,15 @@
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exception_handlers[n] = handler;
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if (n == 0 && cpu_has_divec) {
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- *(volatile u32 *)(ebase + 0x200) = 0x08000000 |
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- (0x03ffffff & (handler >> 2));
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- flush_icache_range(ebase + 0x200, ebase + 0x204);
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+ /* lui k0, 0x0000 */
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+ *(volatile u32 *)(CAC_BASE+0x200) = 0x3c1a0000 | (handler >> 16);
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+ /* ori k0, 0x0000 */
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+ *(volatile u32 *)(CAC_BASE+0x204) = 0x375a0000 | (handler & 0xffff);
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+ /* jr k0 */
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+ *(volatile u32 *)(CAC_BASE+0x208) = 0x03400008;
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+ /* nop */
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+ *(volatile u32 *)(CAC_BASE+0x20C) = 0x00000000;
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+ flush_icache_range(CAC_BASE+0x200, CAC_BASE+0x210);
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}
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return (void *)old_handler;
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}
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