openwrt/target/linux/mediatek/patches-5.15/730-net-phy-add-driver-for-MediaTek-SoC-built-in-GE-PHYs.patch
Daniel Golle 98e6233202 mediatek: update pending SoC Ethernet PHY driver
Update driver for MediaTek's built-in Gigabit Ethernet PHYs which can be
found in the MT7981 and MT7988 SoCs.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 987a0b2b30)
2023-05-24 19:26:52 +01:00

83 lines
2.9 KiB
Diff

From 60ed9eb9605656c19ca402b7bd3f47552e901601 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Mon, 13 Feb 2023 02:33:14 +0000
Subject: [PATCH] net: phy: add driver for MediaTek SoC built-in GE PHYs
Some of MediaTek's Filogic SoCs come with built-in gigabit Ethernet
PHYs which require calibration data from the SoC's efuse.
Despite the similar design the driver doesn't share any code with the
existing mediatek-ge.c, so add support for these PHYs by introducing a
new driver for only MediaTek's ARM64 SoCs.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
MAINTAINERS | 9 +
drivers/net/phy/Kconfig | 12 +
drivers/net/phy/Makefile | 1 +
drivers/net/phy/mediatek-ge-soc.c | 1263 +++++++++++++++++++++++++++++
drivers/net/phy/mediatek-ge.c | 3 +-
5 files changed, 1287 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/phy/mediatek-ge-soc.c
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11797,6 +11797,15 @@ S: Maintained
F: drivers/net/pcs/pcs-mtk-lynxi.c
F: include/linux/pcs/pcs-mtk-lynxi.h
+MEDIATEK ETHERNET PHY DRIVERS
+M: Daniel Golle <daniel@makrotopia.org>
+M: Qingfang Deng <dqfext@gmail.com>
+M: SkyLake Huang <SkyLake.Huang@mediatek.com>
+L: netdev@vger.kernel.org
+S: Maintained
+F: drivers/net/phy/mediatek-ge-soc.c
+F: drivers/net/phy/mediatek-ge.c
+
MEDIATEK I2C CONTROLLER DRIVER
M: Qii Wang <qii.wang@mediatek.com>
L: linux-i2c@vger.kernel.org
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -292,6 +292,18 @@ config MEDIATEK_GE_PHY
help
Supports the MediaTek Gigabit Ethernet PHYs.
+config MEDIATEK_GE_SOC_PHY
+ tristate "MediaTek SoC Ethernet PHYs"
+ depends on (ARM64 && ARCH_MEDIATEK) || COMPILE_TEST
+ select NVMEM_MTK_EFUSE
+ help
+ Supports MediaTek SoC built-in Gigabit Ethernet PHYs.
+
+ Include support for built-in Ethernet PHYs which are present in
+ the MT7981 and MT7988 SoCs. These PHYs need calibration data
+ present in the SoCs efuse and will dynamically calibrate VCM
+ (common-mode voltage) during startup.
+
config MICREL_PHY
tristate "Micrel PHYs"
help
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -81,6 +81,7 @@ obj-$(CONFIG_MARVELL_PHY) += marvell.o
obj-$(CONFIG_MARVELL_88X2222_PHY) += marvell-88x2222.o
obj-$(CONFIG_MAXLINEAR_GPHY) += mxl-gpy.o
obj-$(CONFIG_MEDIATEK_GE_PHY) += mediatek-ge.o
+obj-$(CONFIG_MEDIATEK_GE_SOC_PHY) += mediatek-ge-soc.o
obj-$(CONFIG_MESON_GXL_PHY) += meson-gxl.o
obj-$(CONFIG_MICREL_KS8995MA) += spi_ks8995.o
obj-$(CONFIG_MICREL_PHY) += micrel.o
--- a/drivers/net/phy/mediatek-ge.c
+++ b/drivers/net/phy/mediatek-ge.c
@@ -136,7 +136,8 @@ static struct phy_driver mtk_gephy_drive
module_phy_driver(mtk_gephy_driver);
static struct mdio_device_id __maybe_unused mtk_gephy_tbl[] = {
- { PHY_ID_MATCH_VENDOR(0x03a29400) },
+ { PHY_ID_MATCH_EXACT(0x03a29441) },
+ { PHY_ID_MATCH_EXACT(0x03a29412) },
{ }
};