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1f818b09f8
This series of upstream patches properly implement a clock and reset driver for old ralink SoCs[1]. And it includes some related fixes[2] and improvements[3][4]. All patches have been merged into linux-next. They will be part of upcoming Linux 6.5. In order to switch to the new system controller driver, all clocks and resets properties in SoC dtsi have been updated, and kernel symbol "CONFIG_CLK_MTMIPS" have been added to the kernel config files. [1] https://lore.kernel.org/all/20230619040941.1340372-1-sergio.paracuellos@gmail.com [2] https://lore.kernel.org/all/20230622-mips-ralink-clk-wuninitialized-v1-1-ea9041240d10@kernel.org [3] https://lore.kernel.org/all/OSYP286MB03120BABB25900E113ED42B7BC5CA@OSYP286MB0312.JPNP286.PROD.OUTLOOK.COM [4] https://lore.kernel.org/all/TYAP286MB03151148AF8C054621DD55C3BC23A@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM Tested on Motorola MWR03 (MT7628) Tested on Haier HW-L1W (MT7620) Signed-off-by: Shiji Yang <yangshiji66@qq.com>
245 lines
3.9 KiB
Plaintext
245 lines
3.9 KiB
Plaintext
/dts-v1/;
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "ralink,rt2880-soc";
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aliases {
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serial0 = &uartlite;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "mips,mips24KEc";
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reg = <0>;
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};
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};
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chosen {
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bootargs = "console=ttyS0,57600";
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};
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cpuintc: cpuintc {
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "mti,cpu-interrupt-controller";
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};
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palmbus: palmbus@300000 {
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compatible = "palmbus";
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reg = <0x300000 0x200000>;
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ranges = <0x0 0x300000 0x1FFFFF>;
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#address-cells = <1>;
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#size-cells = <1>;
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sysc: syscon@0 {
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compatible = "ralink,rt2880-sysc", "syscon";
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reg = <0x0 0x100>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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timer: timer@100 {
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compatible = "ralink,rt2880-timer";
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reg = <0x100 0x20>;
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clocks = <&sysc 3>;
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interrupt-parent = <&intc>;
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interrupts = <1>;
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status = "disabled";
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};
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watchdog: watchdog@120 {
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compatible = "ralink,rt2880-wdt";
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reg = <0x120 0x10>;
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clocks = <&sysc 4>;
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};
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intc: intc@200 {
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compatible = "ralink,rt2880-intc";
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reg = <0x200 0x100>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpuintc>;
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interrupts = <2>;
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};
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memc: memc@300 {
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compatible = "ralink,rt2880-memc";
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reg = <0x300 0x100>;
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};
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gpio0: gpio@600 {
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compatible = "ralink,rt2880-gpio";
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reg = <0x600 0x34>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <24>;
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ralink,gpio-base = <0>;
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ralink,register-map = [ 00 04 08 0c
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20 24 28 2c
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30 34 ];
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};
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gpio1: gpio@638 {
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compatible = "ralink,rt2880-gpio";
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reg = <0x638 0x24>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <16>;
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ralink,gpio-base = <24>;
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ralink,register-map = [ 00 04 08 0c
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10 14 18 1c
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20 24 ];
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status = "disabled";
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};
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gpio2: gpio@660 {
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compatible = "ralink,rt2880-gpio";
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reg = <0x660 0x24>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <32>;
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ralink,gpio-base = <40>;
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ralink,register-map = [ 00 04 08 0c
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10 14 18 1c
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20 24 ];
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status = "disabled";
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};
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i2c: i2c@900 {
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compatible = "ralink,rt2880-i2c";
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reg = <0x900 0x100>;
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clocks = <&sysc 6>;
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resets = <&sysc 9>;
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reset-names = "i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c_pins>;
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};
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uartlite: uartlite@c00 {
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compatible = "ralink,rt2880-uart", "ns16550a";
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reg = <0xc00 0x100>;
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clocks = <&sysc 7>;
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interrupt-parent = <&intc>;
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interrupts = <8>;
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reg-shift = <2>;
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};
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};
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pinctrl: pinctrl {
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compatible = "ralink,rt2880-pinmux";
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinctrl0 {
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sdram {
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groups = "sdram";
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function = "sdram";
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};
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};
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i2c_pins: i2c_pins {
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i2c_pins {
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groups = "i2c";
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function = "i2c";
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};
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};
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spi_pins: spi_pins {
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spi_pins {
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groups = "spi";
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function = "spi";
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};
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};
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uartlite_pins: uartlite {
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uart {
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groups = "uartlite";
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function = "uartlite";
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};
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};
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};
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pci: pci@440000 {
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compatible = "ralink,rt288x-pci";
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reg = <0x00440000 0x20000>;
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#address-cells = <3>;
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#size-cells = <2>;
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status = "disabled";
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};
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ethernet: ethernet@400000 {
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compatible = "ralink,rt2880-eth";
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reg = <0x00400000 0x10000>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&sysc 8>;
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resets = <&sysc 18>;
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reset-names = "fe";
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interrupt-parent = <&cpuintc>;
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interrupts = <5>;
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status = "disabled";
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port@0 {
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compatible = "ralink,rt2880-port", "mediatek,eth-port";
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reg = <0>;
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};
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mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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wmac: wmac@480000 {
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compatible = "ralink,rt2880-wmac";
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reg = <0x480000 0x40000>;
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clocks = <&sysc 9>;
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interrupt-parent = <&cpuintc>;
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interrupts = <6>;
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ralink,eeprom = "soc_wmac.eeprom";
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};
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};
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