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b04f245c39
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.23 Removed upstreamed: pending-6.6/735-net-mediatek-mtk_eth_soc-release-MAC_MCR_FORCE_LINK-.patch[1] pending-6.6/736-net-ethernet-mtk_eth_soc-fix-PPE-hanging-issue.patch[2] mediatek/patches-6.6/232-clk-mediatek-mt7981-topckgen-flag-SGM_REG_SEL-as-cri.patch[3] Manually rebased: mediatek/patches-6.6/100-dts-update-mt7622-rfb1.patch Added: generic/backports-6.6/981-mtd-spinand-Add-support-for-5-byte-IDs.patch[4] All other patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.23&id=1f32abb474c1c9bdb21d9eda74c325a0b3a162e5 2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.23&id=943c14ece95eb1cf98d477462aebcbfdfd714633 3. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.23&id=6ff01b314149d1cf59caebc29384f0beed21cba4 4. See comments in https://github.com/openwrt/openwrt/pull/14992 regarding broken flogic/xiaomi_redmi-router-ax6000-ubootmod Build system: x86/64 Build-tested: x86/64/AMD Cezanne, flogic/xiaomi_redmi-router-ax6000-ubootmod, flogic/glinet_gl-mt6000 Run-tested: x86/64/AMD Cezannei, flogic/xiaomi_redmi-router-ax6000-ubootmod, flogic/glinet_gl-mt6000 Signed-off-by: John Audia <therealgraysky@proton.me>
44 lines
1.5 KiB
Diff
44 lines
1.5 KiB
Diff
From fb1f6850be00d8dd8a54017be4c1336e224069ac Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Wed, 16 Nov 2022 22:26:25 +0100
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Subject: [PATCH] arm64: dts: qcom: ipq8074: use msi-parent for PCIe
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Instead of hardcoding the IRQ, simply use msi-parent instead.
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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---
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arch/arm64/boot/dts/qcom/ipq8074.dtsi | 8 +++-----
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1 file changed, 3 insertions(+), 5 deletions(-)
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--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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@@ -755,7 +755,7 @@
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reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;
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ranges = <0 0xb00a000 0xffd>;
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- v2m@0 {
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+ gic_v2m0: v2m@0 {
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compatible = "arm,gic-v2m-frame";
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msi-controller;
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reg = <0x0 0xffd>;
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@@ -868,8 +868,7 @@
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ranges = <0x81000000 0x0 0x00000000 0x10200000 0x0 0x10000>, /* I/O */
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<0x82000000 0x0 0x10220000 0x10220000 0x0 0xfde0000>; /* MEM */
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- interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
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- interrupt-names = "msi";
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+ msi-parent = <&gic_v2m0>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0x7>;
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interrupt-map = <0 0 0 1 &intc 0 0 142
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@@ -930,8 +929,7 @@
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ranges = <0x81000000 0x0 0x00000000 0x20200000 0x0 0x10000>, /* I/O */
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<0x82000000 0x0 0x20220000 0x20220000 0x0 0xfde0000>; /* MEM */
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- interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
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- interrupt-names = "msi";
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+ msi-parent = <&gic_v2m0>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0x7>;
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interrupt-map = <0 0 0 1 &intc 0 0 75
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