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f07e572f64
bcm2708: boot tested on RPi B+ v1.2 bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G bcm2710: boot tested on RPi 3B v1.2 bcm2711: boot tested on RPi 4B v1.1 4G Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
200 lines
6.2 KiB
Diff
200 lines
6.2 KiB
Diff
From 296cff78df285c99a52760cbcd896abc37820e06 Mon Sep 17 00:00:00 2001
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From: Thomas Preston <thomas.preston@codethink.co.uk>
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Date: Thu, 13 Aug 2020 01:38:35 +0100
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Subject: [PATCH] dt/overlays: Add PiFace Digital Device Tree Overlay
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The PiFace Digital is a convenient breakout board for the Microchip
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mcp23s17 SPI GPIO port expander.
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The first eight GPIOs 0..7 (bank A) are connected to eight output
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terminals and LEDs, plus two relays on the first two outputs. These
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output loads are active-high.
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The next eight GPIOs 8..15 (bank B) are connected to eight input
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terminals with four on-board switches connecting them to ground. Inputs
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devices are therefore expected to bridge terminals to ground, so the
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mcp23s17 pullups are activated for GPIO bank B.
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Signed-off-by: Thomas Preston <thomas.preston@codethink.co.uk>
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---
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arch/arm/boot/dts/overlays/Makefile | 1 +
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arch/arm/boot/dts/overlays/README | 8 +
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.../dts/overlays/pifacedigital-overlay.dts | 144 ++++++++++++++++++
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3 files changed, 153 insertions(+)
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create mode 100644 arch/arm/boot/dts/overlays/pifacedigital-overlay.dts
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--- a/arch/arm/boot/dts/overlays/Makefile
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+++ b/arch/arm/boot/dts/overlays/Makefile
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@@ -121,6 +121,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
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papirus.dtbo \
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pca953x.dtbo \
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pibell.dtbo \
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+ pifacedigital.dtbo \
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piglow.dtbo \
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piscreen.dtbo \
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piscreen2r.dtbo \
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--- a/arch/arm/boot/dts/overlays/README
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+++ b/arch/arm/boot/dts/overlays/README
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@@ -1949,6 +1949,14 @@ Params: alsaname Set the
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"PiBell")
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+Name: pifacedigital
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+Info: Configures the PiFace Digital mcp23s17 GPIO port expander.
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+Load: dtoverlay=pifacedigital,<param>=<val>
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+Params: spi-present-mask 8-bit integer, bitmap indicating MCP23S17 SPI0
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+ CS0 address. PiFace Digital supports addresses
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+ 0-3, which can be configured with JP1 and JP2.
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+
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+
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Name: piglow
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Info: Configures the PiGlow by pimoroni.com
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Load: dtoverlay=piglow
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--- /dev/null
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+++ b/arch/arm/boot/dts/overlays/pifacedigital-overlay.dts
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@@ -0,0 +1,144 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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+/*
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+ * PiFace Digital, Device Tree Overlay.
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+ * Copyright (C) 2020 Thomas Preston <thomas.preston@codethink.co.uk>
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+ *
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+ * The PiFace Digital is a convenient breakout board for the Microchip mcp23s17
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+ * SPI GPIO port expander.
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+ *
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+ * The first eight GPIOs 0..7 (bank A) are connected to eight output terminals
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+ * and LEDs, plus two relays on the first two outputs. These output loads are
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+ * active-high.
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+ *
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+ * The next eight GPIOs 8..15 (bank B) are connected to eight input terminals
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+ * with four on-board switches connecting them to ground. Inputs devices are
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+ * therefore expected to bridge terminals to ground, so the mcp23s17 pullups are
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+ * activated for GPIO bank B.
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+ *
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+ * On PiFace Digital, the mcp23s17 is connected to the Raspberry Pi's SPI0 CS0
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+ * bus. Each SPI bus supports up to eight addressable child devices. The PiFace
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+ * Digital only supports addresses 0-4, which can be configured by jumpers JP1
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+ * and JP2.
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+ *
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+ * You can tell the driver about these jumper configurations with the
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+ * spi-present-mask bitmask:
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+ *
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+ * | JP1 | JP2 | dtoverlay line in /boot/config.txt |
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+ * | --- | --- | ------------------------------------------ |
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+ * | 0 | 0 | dtoverlay=pifacedigital |
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+ * | 0 | 0 | dtoverlay=pifacedigital:spi-present-mask=1 |
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+ * | 0 | 1 | dtoverlay=pifacedigital:spi-present-mask=2 |
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+ * | 1 | 0 | dtoverlay=pifacedigital:spi-present-mask=4 |
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+ * | 1 | 1 | dtoverlay=pifacedigital:spi-present-mask=8 |
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+ *
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+ * # Example
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+ * Set the dtoverlay config in /boot/config.txt and power off the Raspberry Pi:
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+ *
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+ * $ grep pifacedigital /boot/config.txt
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+ * dtoverlay=pifacedigital
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+ * $ sudo systemctl poweroff
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+ *
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+ * Attach the PiFace Digital and power on the Raspberry Pi.
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+ * Then use the libgpiod tools to query the device:
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+ *
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+ * $ sudo apt install gpiod
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+ * $ gpiodetect | grep mcp23s17
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+ * gpiochip2 [mcp23s17.0] (16 lines)
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+ *
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+ * Set GPIO outputs 0, 2 and 5:
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+ *
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+ * $ gpioset gpiochip2 0=1 2=1 5=1
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+ *
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+ * Get GPIO status (input GPIO 8..15 are high, because they are active-low):
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+ *
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+ * $ gpioget gpiochip2 {8..15}
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+ * 1 1 1 1 1 1 1 1
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+ *
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+ * And even monitor interrupts:
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+ *
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+ * $ gpiomon gpiochip2 {8..15}
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+ * event: FALLING EDGE offset: 11 timestamp: [1597361662.926741667]
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+ * event: RISING EDGE offset: 11 timestamp: [1597361663.062555051]
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+ *
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+ */
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+
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+/dts-v1/;
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+/plugin/;
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+
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+/ {
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+ compatible = "brcm,bcm2835";
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+
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+ /* Disable exposing /dev/spidev0.0 */
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+ fragment@0 {
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+ target = <&spidev0>;
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+ __overlay__ {
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+ status = "disabled";
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+ };
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+ };
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+
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+ /* Add the PiFace Digital device node to the spi0.0 device. */
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+ fragment@1 {
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+ target = <&spi0>;
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+ __overlay__ {
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+ status = "okay";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ pfdigital: pifacedigital@0 {
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+ compatible = "microchip,mcp23s17";
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+ reg = <0>;
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+
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+ /* Set devices present with 8-bit mask. */
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+ microchip,spi-present-mask = <0x01>;
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+ spi-max-frequency = <500000>;
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+
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+
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+ /* This device can pass through interrupts. */
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+ interrupt-controller;
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+ #interrupt-cells = <2>;
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+
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+ /* INTB is connected to GPIO 25.
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+ * 0x8 active-low level-sensitive
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+ */
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+ interrupts = <25 0x8>;
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+ interrupt-parent = <&gpio>;
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+
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+ /* Configure pull-ups on bank B GPIOs */
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+ pinctrl-0 = <&pfdigital_irq &pfdigital_pullups>;
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+ pinctrl-names = "default";
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+ pfdigital_pullups: pinmux {
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+ pins =
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+ "gpio8",
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+ "gpio9",
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+ "gpio10",
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+ "gpio11",
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+ "gpio12",
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+ "gpio13",
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+ "gpio14",
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+ "gpio15";
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+ bias-pull-up;
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+ };
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+ };
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+ };
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+ };
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+
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+ /* PiFace Digital mcp23s17 INTB pin is connected to GPIO 25. The INTB
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+ * pin is configured active-low (0 on interrupt), so expect to see
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+ * FALLING_EDGE when inputs are bridged to ground (switch is pressed).
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+ */
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+ fragment@3 {
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+ target = <&gpio>;
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+ __overlay__ {
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+ pfdigital_irq: pifacedigital_irq {
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+ brcm,pins = <25>;
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+ brcm,function = <0>; /* input */
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+ };
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+ };
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+ };
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+
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+ __overrides__ {
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+ spi-present-mask = <&pfdigital>, "microchip,spi-present-mask:0";
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+ };
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+};
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