mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-24 07:46:48 +00:00
af8a059bb4
The GL.iNet GL-XE300 is a 4G LTE Wireless router, based on QCA9531 SoC. Specifications: - SoC: QCA9531 (650MHz) - RAM: DDR2 128M - Flash: SPI NOR 16M + SPI NAND 128M - WiFi: 2.4GHz with 2 antennas - Ethernet: - 1x LAN (10/100M) - 1x WAN (10/100M) - LTE: - USB: 1x USB 2.0 port - UART: - 3.3V, TX, RX, GND / 115200 8N1 MAC addresses as verified by OEM firmware: use address source LAN *:c5 art 0x0 (label) WAN *:c6 label + 1 WLAN *:c7 art 0x1002 Installation via U-Boot rescue: 1. Press and hold reset and power buttons simultaneously 2. Wait for the LAN led to blink 5 times 3. Release reset and power buttons 4. The rescue page is accessible via http://192.168.1.1 5. Select the OpenWrt factory image and start upgrade 6. Wait for the router to flash new firmware and reboot Revert to stock firmware: i. Download the stock firmware from GL.Inet website ii. Use the same method explained above to flash the stock firmware Signed-off-by: Victorien Molle <victorien.molle@wifirst.fr> [update commit message] Signed-off-by: David Bauer <mail@david-bauer.net>
169 lines
2.5 KiB
Plaintext
169 lines
2.5 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
|
|
#include "qca953x.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
/ {
|
|
compatible = "glinet,gl-xe300", "qca,qca9531";
|
|
model = "GL.iNet GL-XE300";
|
|
|
|
gpio-export {
|
|
compatible = "gpio-export";
|
|
|
|
gpio_lte_power {
|
|
gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
|
|
gpio-export,name = "lte_power";
|
|
gpio-export,output = <1>;
|
|
};
|
|
|
|
gpio_sd_detect {
|
|
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
|
|
gpio-export,name = "sd_detect";
|
|
gpio-export,output = <0>;
|
|
};
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&jtag_disable_pins>;
|
|
|
|
reset {
|
|
label = "reset";
|
|
linux,code = <KEY_RESTART>;
|
|
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
lan {
|
|
gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
|
|
label = "green:lan";
|
|
};
|
|
|
|
wan {
|
|
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
|
|
label = "green:wan";
|
|
};
|
|
|
|
wlan {
|
|
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
|
|
label = "green:wlan";
|
|
linux,default-trigger = "phy0tpt";
|
|
};
|
|
|
|
lte {
|
|
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
|
|
label = "green:lte";
|
|
};
|
|
};
|
|
};
|
|
|
|
&pcie0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_phy {
|
|
status = "okay";
|
|
};
|
|
|
|
&spi {
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <25000000>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x0 0x40000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@40000 {
|
|
label = "u-boot-env";
|
|
reg = <0x40000 0x10000>;
|
|
};
|
|
|
|
art: partition@50000 {
|
|
label = "art";
|
|
reg = <0x50000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@60000 {
|
|
label = "kernel";
|
|
reg = <0x60000 0x400000>;
|
|
};
|
|
|
|
partition@460000 {
|
|
label = "nor_reserved";
|
|
reg = <0x460000 0xba0000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
flash@1 {
|
|
compatible = "spi-nand";
|
|
reg = <1>;
|
|
spi-max-frequency = <25000000>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "ubi";
|
|
reg = <0x0 0x8000000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ð0 {
|
|
status = "okay";
|
|
|
|
phy-handle = <&swphy4>;
|
|
|
|
nvmem-cells = <&macaddr_art_0>;
|
|
nvmem-cell-names = "mac-address";
|
|
mtd-mac-address-increment = <1>;
|
|
};
|
|
|
|
ð1 {
|
|
nvmem-cells = <&macaddr_art_0>;
|
|
nvmem-cell-names = "mac-address";
|
|
};
|
|
|
|
&wmac {
|
|
status = "okay";
|
|
|
|
mtd-cal-data = <&art 0x1000>;
|
|
};
|
|
|
|
&art {
|
|
compatible = "nvmem-cells";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
macaddr_art_0: macaddr@0 {
|
|
reg = <0x0 0x6>;
|
|
};
|
|
};
|