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862352cdbd
The Aerohive HiveAP 121 has the wrong PLL value set for Gigabit speeds,
leading to packet-loss. 10M and 100M work fine.
This commit sets the Gigabit Ethernet PLL value to the correct value,
fixing packet loss.
Confirmed with iperf and floodping.
Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit cb49e46a8a)
154 lines
4.2 KiB
C
154 lines
4.2 KiB
C
/*
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* Aerohive HiveAP 121 board support
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*
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* Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/gpio.h>
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#include <linux/i2c.h>
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#include <linux/i2c-gpio.h>
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#include <linux/platform_device.h>
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#include <linux/ath9k_platform.h>
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#include <linux/platform/ar934x_nfc.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-nfc.h"
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#include "dev-usb.h"
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#include "dev-wmac.h"
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#include "dev-ap9x-pci.h"
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#include "dev-m25p80.h"
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#include "machtypes.h"
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#define HIVEAP_121_GPIO_LED_ORANGE 14
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#define HIVEAP_121_GPIO_LED_WHITE 21
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#define HIVEAP_121_GPIO_I2C_SCL 12
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#define HIVEAP_121_GPIO_I2C_SDA 13
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#define HIVEAP_121_GPIO_XLNA0 20
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#define HIVEAP_121_GPIO_XLNA1 19
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#define HIVEAP_121_GPIO_USB_POWER 15
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#define HIVEAP_121_GPIO_BTN_RESET 4
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#define HIVEAP_121_KEYS_POLL_INTERVAL 20 /* msecs */
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#define HIVEAP_121_KEYS_DEBOUNCE_INTERVAL \
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(3 * HIVEAP_121_KEYS_POLL_INTERVAL)
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#define HIVEAP_121_MAC_OFFSET 0x90000
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#define HIVEAP_121_LAN_PHYADDR 0
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static struct gpio_led hiveap_121_leds_gpio[] __initdata = {
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{
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.name = "hiveap-121:orange:power",
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.gpio = HIVEAP_121_GPIO_LED_ORANGE,
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.active_low = 1,
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}, {
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.name = "hiveap-121:white:power",
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.gpio = HIVEAP_121_GPIO_LED_WHITE,
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.active_low = 1,
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}
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};
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static struct gpio_keys_button hiveap_121_gpio_keys[] __initdata = {
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{
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.desc = "reset",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = HIVEAP_121_KEYS_DEBOUNCE_INTERVAL,
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.gpio = HIVEAP_121_GPIO_BTN_RESET,
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.active_low = 1,
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},
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};
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static struct i2c_gpio_platform_data hiveap_121_i2c_gpio_data = {
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.sda_pin = HIVEAP_121_GPIO_I2C_SDA,
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.scl_pin = HIVEAP_121_GPIO_I2C_SCL,
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};
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static struct platform_device hiveap_121_i2c_gpio_device = {
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.name = "i2c-gpio",
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.id = 0,
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.dev = {
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.platform_data = &hiveap_121_i2c_gpio_data,
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}
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};
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static struct i2c_board_info tpm_i2c_info[] __initdata = {
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{
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I2C_BOARD_INFO("tpm_i2c_atmel", 0x29),
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}
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};
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static void __init hiveap_121_setup(void)
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{
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u8 *base = (u8 *) KSEG1ADDR(0x1f000000);
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u8 wlan0_mac[ETH_ALEN];
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u8 wlan1_mac[ETH_ALEN];
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/* NAND */
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ath79_nfc_set_ecc_mode(AR934X_NFC_ECC_HW);
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ath79_register_nfc();
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/* SPI */
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ath79_register_m25p80(NULL);
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/* MDIO Interface */
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ath79_register_mdio(0, 0x0);
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ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
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AR934X_ETH_CFG_RXD_DELAY |
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AR934X_ETH_CFG_RDV_DELAY);
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/* GMAC0 is connected to the RGMII interface to an Atheros AR8035-A */
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ath79_init_mac(ath79_eth0_data.mac_addr,
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base + HIVEAP_121_MAC_OFFSET, 0);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.phy_mask = BIT(HIVEAP_121_LAN_PHYADDR);
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ath79_eth0_pll_data.pll_1000 = 0x06000000;
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ath79_eth0_pll_data.pll_100 = 0x00000101;
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ath79_eth0_pll_data.pll_10 = 0x00001313;
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ath79_register_eth(0);
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/* i2c */
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ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
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platform_device_register(&hiveap_121_i2c_gpio_device);
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/* TPM */
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i2c_register_board_info(0, tpm_i2c_info, ARRAY_SIZE(tpm_i2c_info));
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/* LEDs and Buttons */
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ath79_register_leds_gpio(-1, ARRAY_SIZE(hiveap_121_leds_gpio),
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hiveap_121_leds_gpio);
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ath79_register_gpio_keys_polled(-1, HIVEAP_121_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(hiveap_121_gpio_keys),
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hiveap_121_gpio_keys);
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/* USB */
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gpio_request_one(HIVEAP_121_GPIO_USB_POWER,
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GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
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"USB power");
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ath79_register_usb();
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/* XLNA - SoC Wireless */
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ath79_wmac_set_ext_lna_gpio(0, HIVEAP_121_GPIO_XLNA0);
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ath79_wmac_set_ext_lna_gpio(1, HIVEAP_121_GPIO_XLNA1);
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/* SoC Wireless */
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ath79_init_mac(wlan0_mac, base + HIVEAP_121_MAC_OFFSET, 1);
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ath79_register_wmac(NULL, wlan0_mac); /* Caldata in OTP */
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/* PCIe Wireless */
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ath79_init_mac(wlan1_mac, base + HIVEAP_121_MAC_OFFSET, 2);
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ap91_pci_init(NULL, wlan1_mac); /* Caldata in OTP */
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}
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MIPS_MACHINE(ATH79_MACH_HIVEAP_121, "HiveAP-121", "Aerohive HiveAP-121",
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hiveap_121_setup);
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