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14bf60deb8
MikroTik RB5009 uses RouterBoot as its bootloader like all MikroTik devices running RouterOS, meaning that its not FIT compatible and can only boot ELF images. Now this is not so much of an issue on ARM or MIPS since kernel supports appending DTB-s to it (Or we patch the kernel to embed it), but on ARM64 there is intentionally no such support. RouterBoot will pass a DTB, but its the broken MikroTik one which is a modified reference DTB and incorrect in more places than its valid so we cannot use it to boot our kernel. Thus, the solution is to use an intermediary loader and luckily for us Armada 7040 is well supported in U-Boot which makes it a great option since it supports anything that we will ever need to boot. Upstream U-Boot currently requires the Armada boards to be converted to OF_UPSTREAM before adding anything new and this requires updating all of the drivers to accomodate the Linux DTS, while I plan to do this eventually we will need to keep this board downstream for now. Most stuff is supported in U-Boot, including networking since the switch is preconfigured by RouterBoot. A custom environment is used to try and boot from the following devices: 1. NAND (UBI) 2. USB 3. Networking If NAND boot fails then U-Boot will attempt to boot OpenWrt initramfs from USB or via networking. There is a manual recovery mechanism implemented where if the reset button is held when U-Boot is booting it will try to boot OpenWrt initramfs from: 1. USB 2. Networking When U-Boot is in recovery mode it will light all of the LED-s except the switch ones. Link: https://github.com/openwrt/openwrt/pull/15765 Signed-off-by: Robert Marko <robimarko@gmail.com>
109 lines
3.3 KiB
Diff
109 lines
3.3 KiB
Diff
From 0de5d031f36bca4f7c2686287eff1ef0f5412367 Mon Sep 17 00:00:00 2001
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From: Sergey Sergeev <adron@yapic.net>
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Date: Sun, 16 Jan 2022 17:19:35 +0100
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Subject: [PATCH 2/3] net: mvpp2: fix 10GBase-R support
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Due to the lack of XPCS register initialization code and partially incorrect
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initialization of the MPCS network controler registers (tested on Mikrotik RB5009
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in conjunction with MV88E6393X) the network does not work correctly.
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The problem manifests itself as an arbitrary delay (0.4-4 sec) for the actual
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data transmission to the network! Accordingly, an almost completely non-working
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network for U-Boot is obtained. The code is backported from a similar Linux driver.
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Signed-off-by: Sergey Sergeev <adron@yapic.net>
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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---
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drivers/net/mvpp2.c | 73 +++++++++++++++++++++++++++++++++++++++++++++
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1 file changed, 73 insertions(+)
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--- a/drivers/net/mvpp2.c
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+++ b/drivers/net/mvpp2.c
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@@ -3255,6 +3255,76 @@ static int gop_gpcs_reset(struct mvpp2_p
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return 0;
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}
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+static void gop_pcs_reset_assert(struct mvpp2_port *port)
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+{
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+ u32 val;
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+
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+ if (port->priv->hw_version == MVPP21 || port->gop_id != 0)
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+ return;
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+
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+ val = readl(port->priv->mpcs_base + port->gop_id * MVPP22_PORT_OFFSET +
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+ PCS_CLOCK_RESET);
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+ val &= ~(MAC_CLK_RESET_MASK | RX_SD_CLK_RESET_MASK | TX_SD_CLK_RESET_MASK);
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+ val |= CLK_DIV_PHASE_SET_MASK;
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+ writel(val, port->priv->mpcs_base + port->gop_id * MVPP22_PORT_OFFSET +
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+ PCS_CLOCK_RESET);
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+
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+ val = readl(port->priv->xpcs_base + port->gop_id * MVPP22_PORT_OFFSET +
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+ MVPP22_XPCS_GLOBAL_CFG_0_REG);
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+ val &= ~MVPP22_XPCS_PCSRESET;
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+ writel(val, port->priv->xpcs_base + port->gop_id * MVPP22_PORT_OFFSET +
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+ MVPP22_XPCS_GLOBAL_CFG_0_REG);
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+}
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+
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+static void gps_pcs_reset_deassert(struct mvpp2_port *port)
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+{
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+ u32 val;
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+
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+ if (port->priv->hw_version == MVPP21 || port->gop_id != 0)
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+ return;
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+
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+ /* this code is only for case of PHY_INTERFACE_MODE_10GBASER! */
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+ val = readl(port->priv->mpcs_base + port->gop_id * MVPP22_PORT_OFFSET +
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+ PCS_CLOCK_RESET);
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+ val |= MAC_CLK_RESET_MASK | RX_SD_CLK_RESET_MASK |
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+ TX_SD_CLK_RESET_MASK;
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+ val &= ~CLK_DIV_PHASE_SET_MASK;
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+ writel(val, port->priv->mpcs_base + port->gop_id * MVPP22_PORT_OFFSET +
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+ PCS_CLOCK_RESET);
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+}
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+
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+/* Set the internal mux's to the required PCS in the PI */
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+static int gop_xpcs_mode(struct mvpp2_port *port, int num_of_lanes)
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+{
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+ u32 val;
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+ int lane;
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+
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+ switch (num_of_lanes) {
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+ case 1:
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+ lane = 0;
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+ break;
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+ case 2:
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+ lane = 1;
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+ break;
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+ case 4:
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+ lane = 2;
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+ break;
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+ default:
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+ return -1;
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+ }
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+
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+ /* configure XG MAC mode */
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+ val = readl(port->priv->xpcs_base + port->gop_id * MVPP22_PORT_OFFSET +
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+ MVPP22_XPCS_GLOBAL_CFG_0_REG);
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+ val &= ~MVPP22_XPCS_PCSMODE_MASK;
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+ val &= ~MVPP22_XPCS_LANEACTIVE_MASK;
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+ val |= (2 * lane) << MVPP22_XPCS_LANEACTIVE_OFFS;
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+ writel(val, port->priv->xpcs_base + port->gop_id * MVPP22_PORT_OFFSET +
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+ MVPP22_XPCS_GLOBAL_CFG_0_REG);
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+
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+ return 0;
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+}
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+
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static int gop_mpcs_mode(struct mvpp2_port *port)
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{
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u32 val;
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@@ -3397,7 +3467,10 @@ static int gop_port_init(struct mvpp2_po
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num_of_act_lanes = 2;
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mac_num = 0;
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/* configure PCS */
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+ gop_pcs_reset_assert(port);
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+ gop_xpcs_mode(port, num_of_act_lanes);
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gop_mpcs_mode(port);
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+ gps_pcs_reset_deassert(port);
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/* configure MAC */
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gop_xlg_mac_mode_cfg(port, num_of_act_lanes);
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