openwrt/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/mt65xx.h>

#include "mt7986a.dtsi"

/ {
	model = "GL.iNet GL-MT6000";
	compatible = "glinet,gl-mt6000", "mediatek,mt7986a";

	aliases {
		serial0 = &uart0;
		led-boot = &led_blue;
		led-failsafe = &led_blue;
		led-running = &led_white;
		led-upgrade = &led_white;
	};

	chosen {
		stdout-path = "serial0:115200n8";
		bootargs-append = " root=PARTLABEL=rootfs rootwait";
	};

	reg_1p8v: regulator-1p8v {
		compatible = "regulator-fixed";
		regulator-name = "1.8vd";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-3.3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			linux,code = <KEY_RESTART>;
			gpios = <&pio 9 GPIO_ACTIVE_LOW>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_blue: led@0 {
			label = "blue:run";
			gpios = <&pio 38 GPIO_ACTIVE_LOW>;
		};

		led_white: led@1 {
			label = "white:system";
			gpios = <&pio 37 GPIO_ACTIVE_LOW>;
		};
	};

	usb_vbus: regulator-usb-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpios = <&pio 24 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		regulator-boot-on;
	};
};

&eth {
	status = "okay";

	gmac0: mac@0 {
		compatible = "mediatek,eth-mac";
		reg = <0>;
		phy-mode = "2500base-x";

		fixed-link {
			speed = <2500>;
			full-duplex;
			pause;
		};
	};

	gmac1: mac@1 {
		compatible = "mediatek,eth-mac";
		reg = <1>;
		phy-mode = "2500base-x";
		phy-handle = <&phy1>;
	};

	mdio: mdio-bus {
		#address-cells = <1>;
		#size-cells = <0>;

		phy1: phy@1 {
			compatible = "ethernet-phy-ieee802.3-c45";
			reg = <1>;
			reset-assert-us = <100000>;
			reset-deassert-us = <100000>;
			reset-gpios = <&pio 10 GPIO_ACTIVE_LOW>;
			interrupt-parent = <&pio>;
			interrupts = <46 IRQ_TYPE_LEVEL_LOW>;
			realtek,aldps-enable;
		};

		phy7: ethernet-phy@7 {
			compatible = "ethernet-phy-ieee802.3-c45";
			reg = <7>;
			reset-assert-us = <100000>;
			reset-deassert-us = <100000>;
			reset-gpios = <&pio 19 GPIO_ACTIVE_LOW>;
			interrupt-parent = <&pio>;
			interrupts = <47 IRQ_TYPE_LEVEL_LOW>;
			realtek,aldps-enable;
		};

		switch: switch@1f {
			compatible = "mediatek,mt7531";
			reg = <31>;
			reset-gpios = <&pio 18 GPIO_ACTIVE_HIGH>;
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&pio>;
			interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					label = "lan2";
				};

				port@1 {
					reg = <1>;
					label = "lan3";
				};

				port@2 {
					reg = <2>;
					label = "lan4";
				};

				port@3 {
					reg = <3>;
					label = "lan5";
				};

				port@5 {
					reg = <5>;
					label = "lan1";
					phy-handle = <&phy7>;
					phy-mode = "2500base-x";
				};

				port@6 {
					reg = <6>;
					ethernet = <&gmac0>;
					phy-mode = "2500base-x";

					fixed-link {
						speed = <2500>;
						full-duplex;
						pause;
					};
				};
			};
		};
	};
};

&pio {
	wf_2g_5g_pins: wf_2g_5g-pins {
		mux {
			function = "wifi";
			groups = "wf_2g", "wf_5g";
		};
		conf {
			pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
			       "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
			       "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
			       "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
			       "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
			       "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
			       "WF1_TOP_CLK", "WF1_TOP_DATA";
			drive-strength = <4>;
		};
	};

	mmc0_pins_default: mmc0-pins {
		mux {
			function = "emmc";
			groups = "emmc_51";
		};
		conf-cmd-dat {
			pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
			       "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
			       "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
			input-enable;
			drive-strength = <4>;
			mediatek,pull-up-adv = <1>;	/* pull-up 10K */
		};
		conf-clk {
			pins = "EMMC_CK";
			drive-strength = <6>;
			mediatek,pull-down-adv = <2>;	/* pull-down 50K */
		};
		conf-ds {
			pins = "EMMC_DSL";
			mediatek,pull-down-adv = <2>;	/* pull-down 50K */
		};
		conf-rst {
			pins = "EMMC_RSTB";
			drive-strength = <4>;
			mediatek,pull-up-adv = <1>;	/* pull-up 10K */
		};
	};

	mmc0_pins_uhs: mmc0-uhs-pins {
		mux {
			function = "emmc";
			groups = "emmc_51";
		};
		conf-cmd-dat {
			pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
			       "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
			       "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
			input-enable;
			drive-strength = <4>;
			mediatek,pull-up-adv = <1>;	/* pull-up 10K */
		};
		conf-clk {
			pins = "EMMC_CK";
			drive-strength = <6>;
			mediatek,pull-down-adv = <2>;	/* pull-down 50K */
		};
		conf-ds {
			pins = "EMMC_DSL";
			mediatek,pull-down-adv = <2>;	/* pull-down 50K */
		};
		conf-rst {
			pins = "EMMC_RSTB";
			drive-strength = <4>;
			mediatek,pull-up-adv = <1>;	/* pull-up 10K */
		};
	};
};

&crypto {
	status = "okay";
};

&ssusb {
	vusb33-supply = <&reg_3p3v>;
	vbus-supply = <&usb_vbus>;
	status = "okay";
};

&trng {
	status = "okay";
};

&uart0 {
	status = "okay";
};

&usb_phy {
	status = "okay";
};

&watchdog {
	status = "okay";
};

&wifi {
	pinctrl-names = "default";
	pinctrl-0 = <&wf_2g_5g_pins>;
	status = "okay";
};

&mmc0 {
	pinctrl-names = "default", "state_uhs";
	pinctrl-0 = <&mmc0_pins_default>;
	pinctrl-1 = <&mmc0_pins_uhs>;
	bus-width = <8>;
	max-frequency = <200000000>;
	cap-mmc-highspeed;
	mmc-hs200-1_8v;
	mmc-hs400-1_8v;
	hs400-ds-delay = <0x14014>;
	vmmc-supply = <&reg_3p3v>;
	vqmmc-supply = <&reg_1p8v>;
	non-removable;
	no-sd;
	no-sdio;
	status = "okay";
};