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d1c66eacab
This is first step in migrating to a generic i.MX target which in the next steps will also get divided into arch-specific subtargets. In the result, this will make it possible to support, within a single target, also other modern NXP i.MX families, like the i.MX 7, i.MX 8 or recently introduced i.MX 9. Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
70 lines
1.6 KiB
Diff
70 lines
1.6 KiB
Diff
From c8756cbad816954be912ba32277ccd55fe7acc01 Mon Sep 17 00:00:00 2001
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From: Tim Harvey <tharvey@gateworks.com>
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Date: Tue, 12 May 2020 13:59:56 -0700
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Subject: [PATCH 06/20] ARM: dts: imx6qdl-gw5904: add lsm9ds1 iio imu/magn
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support
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Add one node for the accel/gyro i2c device and another for the separate
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magnetometer device in the lsm9ds1.
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Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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---
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arch/arm/boot/dts/imx6qdl-gw5904.dtsi | 31 +++++++++++++++++++++++++++++++
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1 file changed, 31 insertions(+)
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--- a/arch/arm/boot/dts/imx6qdl-gw5904.dtsi
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+++ b/arch/arm/boot/dts/imx6qdl-gw5904.dtsi
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@@ -248,6 +248,15 @@
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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+ magn@1c {
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+ compatible = "st,lsm9ds1-magn";
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+ reg = <0x1c>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_mag>;
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+ interrupt-parent = <&gpio5>;
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+ interrupts = <17 IRQ_TYPE_EDGE_RISING>;
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+ };
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+
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ltc3676: pmic@3c {
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compatible = "lltc,ltc3676";
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reg = <0x3c>;
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@@ -320,6 +329,16 @@
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};
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};
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};
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+
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+ imu@6a {
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+ compatible = "st,lsm9ds1-imu";
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+ reg = <0x6a>;
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+ st,drdy-int-pin = <1>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_imu>;
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+ interrupt-parent = <&gpio4>;
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+ interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
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+ };
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};
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&i2c3 {
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@@ -501,6 +520,18 @@
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>;
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};
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+ pinctrl_imu: imugrp {
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+ fsl,pins = <
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+ MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
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+ >;
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+ };
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+
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+ pinctrl_mag: maggrp {
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+ fsl,pins = <
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+ MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0
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+ >;
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+ };
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+
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pinctrl_pcie: pciegrp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* PCIE RST */
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