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b40e6bc55f
In ath79, for several SoCs the console bootargs are defined to the
very same value in every device's DTS. Consolidate these definitions
in the SoC dtsi files and drop further redundant definitions elsewhere.
The only device without any bootargs set has been OpenMesh OM5P-AC V2.
This will now inherit the setting from qca955x.dtsi
While this is a cosmetic change, backporting it to 19.07 will be a
major help for anyone doing backports of device support. Without it,
every backporter would have to remember to manually add the chosen node
to the device's DTS.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit 635f111148
)
269 lines
4.6 KiB
Plaintext
269 lines
4.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "qca956x.dtsi"
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/ {
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compatible = "tplink,archer-c7-v4", "qca,qca9563";
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model = "TP-Link Archer C7 v4";
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aliases {
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led-boot = &system;
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led-failsafe = &system;
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led-running = &system;
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led-upgrade = &system;
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};
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led_spi {
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compatible = "spi-gpio";
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#address-cells = <1>;
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#size-cells = <0>;
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gpio-sck = <&gpio 15 GPIO_ACTIVE_HIGH>; // 74HC595 SRCLK (Serial Clock)
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gpio-mosi = <&gpio 14 GPIO_ACTIVE_HIGH>; // 74HC595 SER (Serial)
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cs-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; // 74HC595 RCLK (Register Clock)
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num-chipselects = <1>;
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led_gpio: led_gpio@0 {
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compatible = "fairchild,74hc595";
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reg = <0>;
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gpio-controller;
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#gpio-cells = <2>;
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registers-number = <1>;
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spi-max-frequency = <10000000>;
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};
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};
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gpio-export {
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compatible = "gpio-export";
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gpio_shift_register_oe {
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gpio-export,name = "tp-link:oe:sr";
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gpio-export,output = <0>;
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gpios = <&gpio 1 GPIO_ACTIVE_LOW>; // 74HC595 /OE (Output Enable)
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};
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gpio_shift_register_reset {
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gpio-export,name = "tp-link:reset:sr";
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gpio-export,output = <1>;
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gpios = <&gpio 21 GPIO_ACTIVE_LOW>; // 74HC595 /SRCLR (Serial Clear)
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};
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};
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leds {
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compatible = "gpio-leds";
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system: system {
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label = "tp-link:green:system";
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gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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usb1 {
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label = "tp-link:green:usb1";
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gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
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trigger-sources = <&hub_port1>;
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linux,default-trigger = "usbport";
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};
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usb2 {
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label = "tp-link:green:usb2";
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gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
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trigger-sources = <&hub_port0>;
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linux,default-trigger = "usbport";
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};
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wlan5g {
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label = "tp-link:green:wlan5g";
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gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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wlan2g {
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label = "tp-link:green:wlan2g";
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gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1tpt";
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};
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wan {
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label = "tp-link:green:wan";
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gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
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};
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wan_fail {
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label = "tp-link:orange:wan";
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gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
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};
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lan1 {
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label = "tp-link:green:lan1";
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gpios = <&led_gpio 4 GPIO_ACTIVE_LOW>;
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};
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lan2 {
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label = "tp-link:green:lan2";
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gpios = <&led_gpio 3 GPIO_ACTIVE_LOW>;
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};
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lan3 {
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label = "tp-link:green:lan3";
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gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
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};
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lan4 {
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label = "tp-link:green:lan4";
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gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
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};
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wps {
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label = "tp-link:green:wps";
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gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "Reset button";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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wps {
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label = "WPS button";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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};
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};
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&pcie {
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status = "okay";
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};
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&uart {
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status = "okay";
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};
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&gpio {
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status = "okay";
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};
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&usb_phy0 {
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status = "okay";
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};
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&usb0 {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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hub_port0: port@1 {
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reg = <1>;
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#trigger-source-cells = <0>;
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};
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};
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&usb_phy1 {
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status = "okay";
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};
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&usb1 {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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hub_port1: port@1 {
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reg = <1>;
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#trigger-source-cells = <0>;
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};
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};
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&spi {
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status = "okay";
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num-cs = <1>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <25000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "factory-uboot";
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reg = <0x000000 0x020000>;
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read-only;
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};
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partition@20000 {
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label = "u-boot";
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reg = <0x020000 0x020000>;
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read-only;
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};
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partition@40000 {
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label = "firmware";
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reg = <0x040000 0xec0000>;
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compatible = "denx,uimage";
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};
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info: partition@f00000 {
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label = "info";
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reg = <0xf00000 0x0f0000>;
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read-only;
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};
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art: partition@ff0000 {
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label = "art";
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reg = <0xff0000 0x010000>;
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read-only;
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};
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};
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};
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};
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&mdio0 {
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status = "okay";
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phy-mask = <0>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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phy-mode = "sgmii";
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qca,mib-poll-interval = <500>;
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qca,ar8327-initvals = <
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0x04 0x80080080 /* PORT0 PAD MODE CTRL */
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0x7c 0x0000007e /* PORT0_STATUS */
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0x94 0x00000200 /* PORT6_STATUS */
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>;
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};
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};
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ð0 {
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status = "okay";
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pll-data = <0x03000101 0x00000101 0x00001919>;
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phy-mode = "sgmii";
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mtd-mac-address = <&info 0x8>;
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phy-handle = <&phy0>;
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};
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&wmac {
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status = "okay";
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mtd-cal-data = <&art 0x1000>;
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mtd-mac-address = <&info 0x8>;
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};
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