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Import patches for the MT7530 DSA driver from net-next tree: cae425cb43fe net: dsa: allow DSA switch drivers to provide their own phylink mac ops dd0c9855b413 net: dsa: introduce dsa_phylink_to_port() 7c5e37d7ee78 net: dsa: mt7530: simplify core operations 868ff5f4944a net: dsa: mt7530-mdio: read PHY address of switch from device tree 2c606d138518 net: dsa: mt7530: fix port mirroring for MT7988 SoC switch d59cf049c837 net: dsa: mt7530: fix mirroring frames received on local port 62d6d91db98a net: dsa: mt7530: provide own phylink MAC operations Signed-off-by: Daniel Golle <daniel@makrotopia.org>
239 lines
8.1 KiB
Diff
239 lines
8.1 KiB
Diff
From 5053a6cf1d50d785078562470d2a63695a9f3bf2 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
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Date: Thu, 18 Apr 2024 08:35:30 +0300
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Subject: [PATCH 4/5] net: dsa: mt7530-mdio: read PHY address of switch from
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device tree
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Read the PHY address the switch listens on from the reg property of the
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switch node on the device tree. This change brings support for MT7530
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switches on boards with such bootstrapping configuration where the switch
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listens on a different PHY address than the hardcoded PHY address on the
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driver, 31.
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As described on the "MT7621 Programming Guide v0.4" document, the MT7530
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switch and its PHYs can be configured to listen on the range of 7-12,
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15-20, 23-28, and 31 and 0-4 PHY addresses.
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There are operations where the switch PHY registers are used. For the PHY
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address of the control PHY, transform the MT753X_CTRL_PHY_ADDR constant
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into a macro and use it. The PHY address for the control PHY is 0 when the
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switch listens on 31. In any other case, it is one greater than the PHY
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address the switch listens on.
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Reviewed-by: Daniel Golle <daniel@makrotopia.org>
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Tested-by: Daniel Golle <daniel@makrotopia.org>
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Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
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Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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---
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drivers/net/dsa/mt7530-mdio.c | 28 +++++++++++++-------------
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drivers/net/dsa/mt7530.c | 37 +++++++++++++++++++++++------------
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drivers/net/dsa/mt7530.h | 4 +++-
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3 files changed, 41 insertions(+), 28 deletions(-)
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--- a/drivers/net/dsa/mt7530-mdio.c
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+++ b/drivers/net/dsa/mt7530-mdio.c
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@@ -18,7 +18,8 @@
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static int
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mt7530_regmap_write(void *context, unsigned int reg, unsigned int val)
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{
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- struct mii_bus *bus = context;
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+ struct mt7530_priv *priv = context;
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+ struct mii_bus *bus = priv->bus;
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u16 page, r, lo, hi;
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int ret;
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@@ -27,36 +28,35 @@ mt7530_regmap_write(void *context, unsig
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lo = val & 0xffff;
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hi = val >> 16;
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- /* MT7530 uses 31 as the pseudo port */
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- ret = bus->write(bus, 0x1f, 0x1f, page);
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+ ret = bus->write(bus, priv->mdiodev->addr, 0x1f, page);
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if (ret < 0)
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return ret;
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- ret = bus->write(bus, 0x1f, r, lo);
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+ ret = bus->write(bus, priv->mdiodev->addr, r, lo);
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if (ret < 0)
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return ret;
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- ret = bus->write(bus, 0x1f, 0x10, hi);
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+ ret = bus->write(bus, priv->mdiodev->addr, 0x10, hi);
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return ret;
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}
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static int
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mt7530_regmap_read(void *context, unsigned int reg, unsigned int *val)
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{
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- struct mii_bus *bus = context;
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+ struct mt7530_priv *priv = context;
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+ struct mii_bus *bus = priv->bus;
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u16 page, r, lo, hi;
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int ret;
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page = (reg >> 6) & 0x3ff;
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r = (reg >> 2) & 0xf;
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- /* MT7530 uses 31 as the pseudo port */
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- ret = bus->write(bus, 0x1f, 0x1f, page);
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+ ret = bus->write(bus, priv->mdiodev->addr, 0x1f, page);
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if (ret < 0)
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return ret;
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- lo = bus->read(bus, 0x1f, r);
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- hi = bus->read(bus, 0x1f, 0x10);
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+ lo = bus->read(bus, priv->mdiodev->addr, r);
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+ hi = bus->read(bus, priv->mdiodev->addr, 0x10);
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*val = (hi << 16) | (lo & 0xffff);
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@@ -107,8 +107,7 @@ mt7531_create_sgmii(struct mt7530_priv *
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mt7531_pcs_config[i]->unlock = mt7530_mdio_regmap_unlock;
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mt7531_pcs_config[i]->lock_arg = &priv->bus->mdio_lock;
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- regmap = devm_regmap_init(priv->dev,
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- &mt7530_regmap_bus, priv->bus,
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+ regmap = devm_regmap_init(priv->dev, &mt7530_regmap_bus, priv,
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mt7531_pcs_config[i]);
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if (IS_ERR(regmap)) {
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ret = PTR_ERR(regmap);
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@@ -153,6 +152,7 @@ mt7530_probe(struct mdio_device *mdiodev
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priv->bus = mdiodev->bus;
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priv->dev = &mdiodev->dev;
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+ priv->mdiodev = mdiodev;
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ret = mt7530_probe_common(priv);
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if (ret)
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@@ -203,8 +203,8 @@ mt7530_probe(struct mdio_device *mdiodev
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regmap_config->reg_stride = 4;
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regmap_config->max_register = MT7530_CREV;
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regmap_config->disable_locking = true;
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- priv->regmap = devm_regmap_init(priv->dev, &mt7530_regmap_bus,
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- priv->bus, regmap_config);
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+ priv->regmap = devm_regmap_init(priv->dev, &mt7530_regmap_bus, priv,
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+ regmap_config);
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if (IS_ERR(priv->regmap))
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return PTR_ERR(priv->regmap);
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -86,22 +86,26 @@ core_read_mmd_indirect(struct mt7530_pri
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int value, ret;
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/* Write the desired MMD Devad */
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- ret = bus->write(bus, 0, MII_MMD_CTRL, devad);
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+ ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
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+ MII_MMD_CTRL, devad);
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if (ret < 0)
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goto err;
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/* Write the desired MMD register address */
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- ret = bus->write(bus, 0, MII_MMD_DATA, prtad);
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+ ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
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+ MII_MMD_DATA, prtad);
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if (ret < 0)
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goto err;
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/* Select the Function : DATA with no post increment */
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- ret = bus->write(bus, 0, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
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+ ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
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+ MII_MMD_CTRL, devad | MII_MMD_CTRL_NOINCR);
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if (ret < 0)
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goto err;
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/* Read the content of the MMD's selected register */
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- value = bus->read(bus, 0, MII_MMD_DATA);
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+ value = bus->read(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
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+ MII_MMD_DATA);
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return value;
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err:
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@@ -118,22 +122,26 @@ core_write_mmd_indirect(struct mt7530_pr
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int ret;
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/* Write the desired MMD Devad */
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- ret = bus->write(bus, 0, MII_MMD_CTRL, devad);
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+ ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
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+ MII_MMD_CTRL, devad);
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if (ret < 0)
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goto err;
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/* Write the desired MMD register address */
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- ret = bus->write(bus, 0, MII_MMD_DATA, prtad);
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+ ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
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+ MII_MMD_DATA, prtad);
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if (ret < 0)
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goto err;
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/* Select the Function : DATA with no post increment */
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- ret = bus->write(bus, 0, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
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+ ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
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+ MII_MMD_CTRL, devad | MII_MMD_CTRL_NOINCR);
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if (ret < 0)
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goto err;
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/* Write the data into MMD's selected register */
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- ret = bus->write(bus, 0, MII_MMD_DATA, data);
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+ ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
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+ MII_MMD_DATA, data);
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err:
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if (ret < 0)
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dev_err(&bus->dev,
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@@ -2670,16 +2678,19 @@ mt7531_setup(struct dsa_switch *ds)
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* phy_[read,write]_mmd_indirect is called, we provide our own
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* mt7531_ind_mmd_phy_[read,write] to complete this function.
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*/
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- val = mt7531_ind_c45_phy_read(priv, MT753X_CTRL_PHY_ADDR,
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+ val = mt7531_ind_c45_phy_read(priv,
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+ MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
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MDIO_MMD_VEND2, CORE_PLL_GROUP4);
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val |= MT7531_RG_SYSPLL_DMY2 | MT7531_PHY_PLL_BYPASS_MODE;
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val &= ~MT7531_PHY_PLL_OFF;
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- mt7531_ind_c45_phy_write(priv, MT753X_CTRL_PHY_ADDR, MDIO_MMD_VEND2,
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- CORE_PLL_GROUP4, val);
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+ mt7531_ind_c45_phy_write(priv,
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+ MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
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+ MDIO_MMD_VEND2, CORE_PLL_GROUP4, val);
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/* Disable EEE advertisement on the switch PHYs. */
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- for (i = MT753X_CTRL_PHY_ADDR;
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- i < MT753X_CTRL_PHY_ADDR + MT7530_NUM_PHYS; i++) {
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+ for (i = MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr);
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+ i < MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr) + MT7530_NUM_PHYS;
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+ i++) {
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mt7531_ind_c45_phy_write(priv, i, MDIO_MMD_AN, MDIO_AN_EEE_ADV,
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0);
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}
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--- a/drivers/net/dsa/mt7530.h
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+++ b/drivers/net/dsa/mt7530.h
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@@ -629,7 +629,7 @@ enum mt7531_clk_skew {
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#define MT7531_PHY_PLL_OFF BIT(5)
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#define MT7531_PHY_PLL_BYPASS_MODE BIT(4)
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-#define MT753X_CTRL_PHY_ADDR 0
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+#define MT753X_CTRL_PHY_ADDR(addr) ((addr + 1) & 0x1f)
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#define CORE_PLL_GROUP5 0x404
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#define RG_LCDDS_PCW_NCPO1(x) ((x) & 0xffff)
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@@ -771,6 +771,7 @@ struct mt753x_info {
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* @irq_enable: IRQ enable bits, synced to SYS_INT_EN
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* @create_sgmii: Pointer to function creating SGMII PCS instance(s)
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* @active_cpu_ports: Holding the active CPU ports
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+ * @mdiodev: The pointer to the MDIO device structure
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*/
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struct mt7530_priv {
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struct device *dev;
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@@ -797,6 +798,7 @@ struct mt7530_priv {
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u32 irq_enable;
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int (*create_sgmii)(struct mt7530_priv *priv);
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u8 active_cpu_ports;
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+ struct mdio_device *mdiodev;
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};
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struct mt7530_hw_vlan_entry {
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