mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-26 08:51:13 +00:00
659f4a13dd
With Linux 6.1 many of our downstream patches and out-of-tree files can be removed or at least replaced by backported upstream commits. Signed-off-by: Daniel Golle <daniel@makrotopia.org> [fix CMDLINE_OVERRIDE for arm64] Signed-off-by: Bjørn Mork <bjorn@mork.no>
791 lines
22 KiB
Diff
791 lines
22 KiB
Diff
From c26e28015b74af73e0b299f6ad3ff22931e600b4 Mon Sep 17 00:00:00 2001
|
|
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
|
|
Date: Fri, 20 Jan 2023 10:20:41 +0100
|
|
Subject: [PATCH 05/15] clk: mediatek: Switch to mtk_clk_simple_probe() where
|
|
possible
|
|
|
|
mtk_clk_simple_probe() is a function that registers mtk gate clocks
|
|
and, if reset data is present, a reset controller and across all of
|
|
the MTK clock drivers, such a function is duplicated many times:
|
|
switch to the common mtk_clk_simple_probe() function for all of the
|
|
clock drivers that are registering as platform drivers.
|
|
|
|
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
|
|
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
|
|
Tested-by: Miles Chen <miles.chen@mediatek.com>
|
|
Link: https://lore.kernel.org/r/20230120092053.182923-12-angelogioacchino.delregno@collabora.com
|
|
Tested-by: Mingming Su <mingming.su@mediatek.com>
|
|
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
|
|
|
[daniel@makrotopia.org: removed parts not relevant for OpenWrt]
|
|
---
|
|
drivers/clk/mediatek/clk-mt2701-aud.c | 31 ++++++----
|
|
drivers/clk/mediatek/clk-mt2701-eth.c | 36 ++++--------
|
|
drivers/clk/mediatek/clk-mt2701-g3d.c | 56 ++++--------------
|
|
drivers/clk/mediatek/clk-mt2701-hif.c | 38 ++++--------
|
|
drivers/clk/mediatek/clk-mt2712.c | 83 ++++++++++----------------
|
|
drivers/clk/mediatek/clk-mt7622-aud.c | 54 ++++++-----------
|
|
drivers/clk/mediatek/clk-mt7622-eth.c | 82 +++++---------------------
|
|
drivers/clk/mediatek/clk-mt7622-hif.c | 85 +++++----------------------
|
|
drivers/clk/mediatek/clk-mt7629-hif.c | 85 +++++----------------------
|
|
9 files changed, 144 insertions(+), 406 deletions(-)
|
|
|
|
--- a/drivers/clk/mediatek/clk-mt2701-aud.c
|
|
+++ b/drivers/clk/mediatek/clk-mt2701-aud.c
|
|
@@ -52,6 +52,7 @@ static const struct mtk_gate_regs audio3
|
|
};
|
|
|
|
static const struct mtk_gate audio_clks[] = {
|
|
+ GATE_DUMMY(CLK_DUMMY, "aud_dummy"),
|
|
/* AUDIO0 */
|
|
GATE_AUDIO0(CLK_AUD_AFE, "audio_afe", "aud_intbus_sel", 2),
|
|
GATE_AUDIO0(CLK_AUD_HDMI, "audio_hdmi", "audpll_sel", 20),
|
|
@@ -114,29 +115,27 @@ static const struct mtk_gate audio_clks[
|
|
GATE_AUDIO3(CLK_AUD_MEM_ASRC5, "audio_mem_asrc5", "asm_h_sel", 14),
|
|
};
|
|
|
|
+static const struct mtk_clk_desc audio_desc = {
|
|
+ .clks = audio_clks,
|
|
+ .num_clks = ARRAY_SIZE(audio_clks),
|
|
+};
|
|
+
|
|
static const struct of_device_id of_match_clk_mt2701_aud[] = {
|
|
- { .compatible = "mediatek,mt2701-audsys", },
|
|
- {}
|
|
+ { .compatible = "mediatek,mt2701-audsys", .data = &audio_desc },
|
|
+ { /* sentinel */ }
|
|
};
|
|
|
|
static int clk_mt2701_aud_probe(struct platform_device *pdev)
|
|
{
|
|
- struct clk_hw_onecell_data *clk_data;
|
|
- struct device_node *node = pdev->dev.of_node;
|
|
int r;
|
|
|
|
- clk_data = mtk_alloc_clk_data(CLK_AUD_NR);
|
|
-
|
|
- mtk_clk_register_gates(&pdev->dev, node, audio_clks,
|
|
- ARRAY_SIZE(audio_clks), clk_data);
|
|
-
|
|
- r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
|
+ r = mtk_clk_simple_probe(pdev);
|
|
if (r) {
|
|
dev_err(&pdev->dev,
|
|
"could not register clock provider: %s: %d\n",
|
|
pdev->name, r);
|
|
|
|
- goto err_clk_provider;
|
|
+ return r;
|
|
}
|
|
|
|
r = devm_of_platform_populate(&pdev->dev);
|
|
@@ -146,13 +145,19 @@ static int clk_mt2701_aud_probe(struct p
|
|
return 0;
|
|
|
|
err_plat_populate:
|
|
- of_clk_del_provider(node);
|
|
-err_clk_provider:
|
|
+ mtk_clk_simple_remove(pdev);
|
|
return r;
|
|
}
|
|
|
|
+static int clk_mt2701_aud_remove(struct platform_device *pdev)
|
|
+{
|
|
+ of_platform_depopulate(&pdev->dev);
|
|
+ return mtk_clk_simple_remove(pdev);
|
|
+}
|
|
+
|
|
static struct platform_driver clk_mt2701_aud_drv = {
|
|
.probe = clk_mt2701_aud_probe,
|
|
+ .remove = clk_mt2701_aud_remove,
|
|
.driver = {
|
|
.name = "clk-mt2701-aud",
|
|
.of_match_table = of_match_clk_mt2701_aud,
|
|
--- a/drivers/clk/mediatek/clk-mt2701-eth.c
|
|
+++ b/drivers/clk/mediatek/clk-mt2701-eth.c
|
|
@@ -20,6 +20,7 @@ static const struct mtk_gate_regs eth_cg
|
|
GATE_MTK(_id, _name, _parent, ð_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
|
|
|
|
static const struct mtk_gate eth_clks[] = {
|
|
+ GATE_DUMMY(CLK_DUMMY, "eth_dummy"),
|
|
GATE_ETH(CLK_ETHSYS_HSDMA, "hsdma_clk", "ethif_sel", 5),
|
|
GATE_ETH(CLK_ETHSYS_ESW, "esw_clk", "ethpll_500m_ck", 6),
|
|
GATE_ETH(CLK_ETHSYS_GP2, "gp2_clk", "trgpll", 7),
|
|
@@ -38,35 +39,20 @@ static const struct mtk_clk_rst_desc clk
|
|
.rst_bank_nr = ARRAY_SIZE(rst_ofs),
|
|
};
|
|
|
|
-static const struct of_device_id of_match_clk_mt2701_eth[] = {
|
|
- { .compatible = "mediatek,mt2701-ethsys", },
|
|
- {}
|
|
+static const struct mtk_clk_desc eth_desc = {
|
|
+ .clks = eth_clks,
|
|
+ .num_clks = ARRAY_SIZE(eth_clks),
|
|
+ .rst_desc = &clk_rst_desc,
|
|
};
|
|
|
|
-static int clk_mt2701_eth_probe(struct platform_device *pdev)
|
|
-{
|
|
- struct clk_hw_onecell_data *clk_data;
|
|
- int r;
|
|
- struct device_node *node = pdev->dev.of_node;
|
|
-
|
|
- clk_data = mtk_alloc_clk_data(CLK_ETHSYS_NR);
|
|
-
|
|
- mtk_clk_register_gates(&pdev->dev, node, eth_clks,
|
|
- ARRAY_SIZE(eth_clks), clk_data);
|
|
-
|
|
- r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
|
- if (r)
|
|
- dev_err(&pdev->dev,
|
|
- "could not register clock provider: %s: %d\n",
|
|
- pdev->name, r);
|
|
-
|
|
- mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
|
|
-
|
|
- return r;
|
|
-}
|
|
+static const struct of_device_id of_match_clk_mt2701_eth[] = {
|
|
+ { .compatible = "mediatek,mt2701-ethsys", .data = ð_desc },
|
|
+ { /* sentinel */ }
|
|
+};
|
|
|
|
static struct platform_driver clk_mt2701_eth_drv = {
|
|
- .probe = clk_mt2701_eth_probe,
|
|
+ .probe = mtk_clk_simple_probe,
|
|
+ .remove = mtk_clk_simple_remove,
|
|
.driver = {
|
|
.name = "clk-mt2701-eth",
|
|
.of_match_table = of_match_clk_mt2701_eth,
|
|
--- a/drivers/clk/mediatek/clk-mt2701-g3d.c
|
|
+++ b/drivers/clk/mediatek/clk-mt2701-g3d.c
|
|
@@ -26,6 +26,7 @@ static const struct mtk_gate_regs g3d_cg
|
|
};
|
|
|
|
static const struct mtk_gate g3d_clks[] = {
|
|
+ GATE_DUMMY(CLK_DUMMY, "g3d_dummy"),
|
|
GATE_G3D(CLK_G3DSYS_CORE, "g3d_core", "mfg_sel", 0),
|
|
};
|
|
|
|
@@ -37,57 +38,20 @@ static const struct mtk_clk_rst_desc clk
|
|
.rst_bank_nr = ARRAY_SIZE(rst_ofs),
|
|
};
|
|
|
|
-static int clk_mt2701_g3dsys_init(struct platform_device *pdev)
|
|
-{
|
|
- struct clk_hw_onecell_data *clk_data;
|
|
- struct device_node *node = pdev->dev.of_node;
|
|
- int r;
|
|
-
|
|
- clk_data = mtk_alloc_clk_data(CLK_G3DSYS_NR);
|
|
-
|
|
- mtk_clk_register_gates(&pdev->dev, node, g3d_clks, ARRAY_SIZE(g3d_clks),
|
|
- clk_data);
|
|
-
|
|
- r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
|
- if (r)
|
|
- dev_err(&pdev->dev,
|
|
- "could not register clock provider: %s: %d\n",
|
|
- pdev->name, r);
|
|
-
|
|
- mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
|
|
-
|
|
- return r;
|
|
-}
|
|
+static const struct mtk_clk_desc g3d_desc = {
|
|
+ .clks = g3d_clks,
|
|
+ .num_clks = ARRAY_SIZE(g3d_clks),
|
|
+ .rst_desc = &clk_rst_desc,
|
|
+};
|
|
|
|
static const struct of_device_id of_match_clk_mt2701_g3d[] = {
|
|
- {
|
|
- .compatible = "mediatek,mt2701-g3dsys",
|
|
- .data = clk_mt2701_g3dsys_init,
|
|
- }, {
|
|
- /* sentinel */
|
|
- }
|
|
+ { .compatible = "mediatek,mt2701-g3dsys", .data = &g3d_desc },
|
|
+ { /* sentinel */ }
|
|
};
|
|
|
|
-static int clk_mt2701_g3d_probe(struct platform_device *pdev)
|
|
-{
|
|
- int (*clk_init)(struct platform_device *);
|
|
- int r;
|
|
-
|
|
- clk_init = of_device_get_match_data(&pdev->dev);
|
|
- if (!clk_init)
|
|
- return -EINVAL;
|
|
-
|
|
- r = clk_init(pdev);
|
|
- if (r)
|
|
- dev_err(&pdev->dev,
|
|
- "could not register clock provider: %s: %d\n",
|
|
- pdev->name, r);
|
|
-
|
|
- return r;
|
|
-}
|
|
-
|
|
static struct platform_driver clk_mt2701_g3d_drv = {
|
|
- .probe = clk_mt2701_g3d_probe,
|
|
+ .probe = mtk_clk_simple_probe,
|
|
+ .remove = mtk_clk_simple_remove,
|
|
.driver = {
|
|
.name = "clk-mt2701-g3d",
|
|
.of_match_table = of_match_clk_mt2701_g3d,
|
|
--- a/drivers/clk/mediatek/clk-mt2701-hif.c
|
|
+++ b/drivers/clk/mediatek/clk-mt2701-hif.c
|
|
@@ -20,6 +20,7 @@ static const struct mtk_gate_regs hif_cg
|
|
GATE_MTK(_id, _name, _parent, &hif_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
|
|
|
|
static const struct mtk_gate hif_clks[] = {
|
|
+ GATE_DUMMY(CLK_DUMMY, "hif_dummy"),
|
|
GATE_HIF(CLK_HIFSYS_USB0PHY, "usb0_phy_clk", "ethpll_500m_ck", 21),
|
|
GATE_HIF(CLK_HIFSYS_USB1PHY, "usb1_phy_clk", "ethpll_500m_ck", 22),
|
|
GATE_HIF(CLK_HIFSYS_PCIE0, "pcie0_clk", "ethpll_500m_ck", 24),
|
|
@@ -35,37 +36,20 @@ static const struct mtk_clk_rst_desc clk
|
|
.rst_bank_nr = ARRAY_SIZE(rst_ofs),
|
|
};
|
|
|
|
-static const struct of_device_id of_match_clk_mt2701_hif[] = {
|
|
- { .compatible = "mediatek,mt2701-hifsys", },
|
|
- {}
|
|
+static const struct mtk_clk_desc hif_desc = {
|
|
+ .clks = hif_clks,
|
|
+ .num_clks = ARRAY_SIZE(hif_clks),
|
|
+ .rst_desc = &clk_rst_desc,
|
|
};
|
|
|
|
-static int clk_mt2701_hif_probe(struct platform_device *pdev)
|
|
-{
|
|
- struct clk_hw_onecell_data *clk_data;
|
|
- int r;
|
|
- struct device_node *node = pdev->dev.of_node;
|
|
-
|
|
- clk_data = mtk_alloc_clk_data(CLK_HIFSYS_NR);
|
|
-
|
|
- mtk_clk_register_gates(&pdev->dev, node, hif_clks,
|
|
- ARRAY_SIZE(hif_clks), clk_data);
|
|
-
|
|
- r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
|
- if (r) {
|
|
- dev_err(&pdev->dev,
|
|
- "could not register clock provider: %s: %d\n",
|
|
- pdev->name, r);
|
|
- return r;
|
|
- }
|
|
-
|
|
- mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
|
|
-
|
|
- return 0;
|
|
-}
|
|
+static const struct of_device_id of_match_clk_mt2701_hif[] = {
|
|
+ { .compatible = "mediatek,mt2701-hifsys", .data = &hif_desc },
|
|
+ { /* sentinel */ }
|
|
+};
|
|
|
|
static struct platform_driver clk_mt2701_hif_drv = {
|
|
- .probe = clk_mt2701_hif_probe,
|
|
+ .probe = mtk_clk_simple_probe,
|
|
+ .remove = mtk_clk_simple_remove,
|
|
.driver = {
|
|
.name = "clk-mt2701-hif",
|
|
.of_match_table = of_match_clk_mt2701_hif,
|
|
--- a/drivers/clk/mediatek/clk-mt2712.c
|
|
+++ b/drivers/clk/mediatek/clk-mt2712.c
|
|
@@ -1337,50 +1337,6 @@ static int clk_mt2712_top_probe(struct p
|
|
return r;
|
|
}
|
|
|
|
-static int clk_mt2712_infra_probe(struct platform_device *pdev)
|
|
-{
|
|
- struct clk_hw_onecell_data *clk_data;
|
|
- int r;
|
|
- struct device_node *node = pdev->dev.of_node;
|
|
-
|
|
- clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK);
|
|
-
|
|
- mtk_clk_register_gates(&pdev->dev, node, infra_clks,
|
|
- ARRAY_SIZE(infra_clks), clk_data);
|
|
-
|
|
- r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
|
-
|
|
- if (r != 0)
|
|
- pr_err("%s(): could not register clock provider: %d\n",
|
|
- __func__, r);
|
|
-
|
|
- mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc[0]);
|
|
-
|
|
- return r;
|
|
-}
|
|
-
|
|
-static int clk_mt2712_peri_probe(struct platform_device *pdev)
|
|
-{
|
|
- struct clk_hw_onecell_data *clk_data;
|
|
- int r;
|
|
- struct device_node *node = pdev->dev.of_node;
|
|
-
|
|
- clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK);
|
|
-
|
|
- mtk_clk_register_gates(&pdev->dev, node, peri_clks,
|
|
- ARRAY_SIZE(peri_clks), clk_data);
|
|
-
|
|
- r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
|
-
|
|
- if (r != 0)
|
|
- pr_err("%s(): could not register clock provider: %d\n",
|
|
- __func__, r);
|
|
-
|
|
- mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc[1]);
|
|
-
|
|
- return r;
|
|
-}
|
|
-
|
|
static int clk_mt2712_mcu_probe(struct platform_device *pdev)
|
|
{
|
|
struct clk_hw_onecell_data *clk_data;
|
|
@@ -1419,12 +1375,6 @@ static const struct of_device_id of_matc
|
|
.compatible = "mediatek,mt2712-topckgen",
|
|
.data = clk_mt2712_top_probe,
|
|
}, {
|
|
- .compatible = "mediatek,mt2712-infracfg",
|
|
- .data = clk_mt2712_infra_probe,
|
|
- }, {
|
|
- .compatible = "mediatek,mt2712-pericfg",
|
|
- .data = clk_mt2712_peri_probe,
|
|
- }, {
|
|
.compatible = "mediatek,mt2712-mcucfg",
|
|
.data = clk_mt2712_mcu_probe,
|
|
}, {
|
|
@@ -1450,6 +1400,33 @@ static int clk_mt2712_probe(struct platf
|
|
return r;
|
|
}
|
|
|
|
+static const struct mtk_clk_desc infra_desc = {
|
|
+ .clks = infra_clks,
|
|
+ .num_clks = ARRAY_SIZE(infra_clks),
|
|
+ .rst_desc = &clk_rst_desc[0],
|
|
+};
|
|
+
|
|
+static const struct mtk_clk_desc peri_desc = {
|
|
+ .clks = peri_clks,
|
|
+ .num_clks = ARRAY_SIZE(peri_clks),
|
|
+ .rst_desc = &clk_rst_desc[1],
|
|
+};
|
|
+
|
|
+static const struct of_device_id of_match_clk_mt2712_simple[] = {
|
|
+ { .compatible = "mediatek,mt2712-infracfg", .data = &infra_desc },
|
|
+ { .compatible = "mediatek,mt2712-pericfg", .data = &peri_desc, },
|
|
+ { /* sentinel */ }
|
|
+};
|
|
+
|
|
+static struct platform_driver clk_mt2712_simple_drv = {
|
|
+ .probe = mtk_clk_simple_probe,
|
|
+ .remove = mtk_clk_simple_remove,
|
|
+ .driver = {
|
|
+ .name = "clk-mt2712-simple",
|
|
+ .of_match_table = of_match_clk_mt2712_simple,
|
|
+ },
|
|
+};
|
|
+
|
|
static struct platform_driver clk_mt2712_drv = {
|
|
.probe = clk_mt2712_probe,
|
|
.driver = {
|
|
@@ -1460,7 +1437,11 @@ static struct platform_driver clk_mt2712
|
|
|
|
static int __init clk_mt2712_init(void)
|
|
{
|
|
- return platform_driver_register(&clk_mt2712_drv);
|
|
+ int ret = platform_driver_register(&clk_mt2712_drv);
|
|
+
|
|
+ if (ret)
|
|
+ return ret;
|
|
+ return platform_driver_register(&clk_mt2712_simple_drv);
|
|
}
|
|
|
|
arch_initcall(clk_mt2712_init);
|
|
--- a/drivers/clk/mediatek/clk-mt7622-aud.c
|
|
+++ b/drivers/clk/mediatek/clk-mt7622-aud.c
|
|
@@ -106,24 +106,22 @@ static const struct mtk_gate audio_clks[
|
|
GATE_AUDIO3(CLK_AUDIO_MEM_ASRC5, "audio_mem_asrc5", "asm_h_sel", 14),
|
|
};
|
|
|
|
-static int clk_mt7622_audiosys_init(struct platform_device *pdev)
|
|
+static const struct mtk_clk_desc audio_desc = {
|
|
+ .clks = audio_clks,
|
|
+ .num_clks = ARRAY_SIZE(audio_clks),
|
|
+};
|
|
+
|
|
+static int clk_mt7622_aud_probe(struct platform_device *pdev)
|
|
{
|
|
- struct clk_hw_onecell_data *clk_data;
|
|
- struct device_node *node = pdev->dev.of_node;
|
|
int r;
|
|
|
|
- clk_data = mtk_alloc_clk_data(CLK_AUDIO_NR_CLK);
|
|
-
|
|
- mtk_clk_register_gates(&pdev->dev, node, audio_clks,
|
|
- ARRAY_SIZE(audio_clks), clk_data);
|
|
-
|
|
- r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
|
+ r = mtk_clk_simple_probe(pdev);
|
|
if (r) {
|
|
dev_err(&pdev->dev,
|
|
"could not register clock provider: %s: %d\n",
|
|
pdev->name, r);
|
|
|
|
- goto err_clk_provider;
|
|
+ return r;
|
|
}
|
|
|
|
r = devm_of_platform_populate(&pdev->dev);
|
|
@@ -133,40 +131,24 @@ static int clk_mt7622_audiosys_init(stru
|
|
return 0;
|
|
|
|
err_plat_populate:
|
|
- of_clk_del_provider(node);
|
|
-err_clk_provider:
|
|
+ mtk_clk_simple_remove(pdev);
|
|
return r;
|
|
}
|
|
|
|
-static const struct of_device_id of_match_clk_mt7622_aud[] = {
|
|
- {
|
|
- .compatible = "mediatek,mt7622-audsys",
|
|
- .data = clk_mt7622_audiosys_init,
|
|
- }, {
|
|
- /* sentinel */
|
|
- }
|
|
-};
|
|
-
|
|
-static int clk_mt7622_aud_probe(struct platform_device *pdev)
|
|
+static int clk_mt7622_aud_remove(struct platform_device *pdev)
|
|
{
|
|
- int (*clk_init)(struct platform_device *);
|
|
- int r;
|
|
-
|
|
- clk_init = of_device_get_match_data(&pdev->dev);
|
|
- if (!clk_init)
|
|
- return -EINVAL;
|
|
-
|
|
- r = clk_init(pdev);
|
|
- if (r)
|
|
- dev_err(&pdev->dev,
|
|
- "could not register clock provider: %s: %d\n",
|
|
- pdev->name, r);
|
|
-
|
|
- return r;
|
|
+ of_platform_depopulate(&pdev->dev);
|
|
+ return mtk_clk_simple_remove(pdev);
|
|
}
|
|
|
|
+static const struct of_device_id of_match_clk_mt7622_aud[] = {
|
|
+ { .compatible = "mediatek,mt7622-audsys", .data = &audio_desc },
|
|
+ { /* sentinel */ }
|
|
+};
|
|
+
|
|
static struct platform_driver clk_mt7622_aud_drv = {
|
|
.probe = clk_mt7622_aud_probe,
|
|
+ .remove = clk_mt7622_aud_remove,
|
|
.driver = {
|
|
.name = "clk-mt7622-aud",
|
|
.of_match_table = of_match_clk_mt7622_aud,
|
|
--- a/drivers/clk/mediatek/clk-mt7622-eth.c
|
|
+++ b/drivers/clk/mediatek/clk-mt7622-eth.c
|
|
@@ -61,80 +61,26 @@ static const struct mtk_clk_rst_desc clk
|
|
.rst_bank_nr = ARRAY_SIZE(rst_ofs),
|
|
};
|
|
|
|
-static int clk_mt7622_ethsys_init(struct platform_device *pdev)
|
|
-{
|
|
- struct clk_hw_onecell_data *clk_data;
|
|
- struct device_node *node = pdev->dev.of_node;
|
|
- int r;
|
|
-
|
|
- clk_data = mtk_alloc_clk_data(CLK_ETH_NR_CLK);
|
|
-
|
|
- mtk_clk_register_gates(&pdev->dev, node, eth_clks,
|
|
- ARRAY_SIZE(eth_clks), clk_data);
|
|
-
|
|
- r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
|
- if (r)
|
|
- dev_err(&pdev->dev,
|
|
- "could not register clock provider: %s: %d\n",
|
|
- pdev->name, r);
|
|
-
|
|
- mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
|
|
-
|
|
- return r;
|
|
-}
|
|
-
|
|
-static int clk_mt7622_sgmiisys_init(struct platform_device *pdev)
|
|
-{
|
|
- struct clk_hw_onecell_data *clk_data;
|
|
- struct device_node *node = pdev->dev.of_node;
|
|
- int r;
|
|
-
|
|
- clk_data = mtk_alloc_clk_data(CLK_SGMII_NR_CLK);
|
|
-
|
|
- mtk_clk_register_gates(&pdev->dev, node, sgmii_clks,
|
|
- ARRAY_SIZE(sgmii_clks), clk_data);
|
|
-
|
|
- r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
|
- if (r)
|
|
- dev_err(&pdev->dev,
|
|
- "could not register clock provider: %s: %d\n",
|
|
- pdev->name, r);
|
|
+static const struct mtk_clk_desc eth_desc = {
|
|
+ .clks = eth_clks,
|
|
+ .num_clks = ARRAY_SIZE(eth_clks),
|
|
+ .rst_desc = &clk_rst_desc,
|
|
+};
|
|
|
|
- return r;
|
|
-}
|
|
+static const struct mtk_clk_desc sgmii_desc = {
|
|
+ .clks = sgmii_clks,
|
|
+ .num_clks = ARRAY_SIZE(sgmii_clks),
|
|
+};
|
|
|
|
static const struct of_device_id of_match_clk_mt7622_eth[] = {
|
|
- {
|
|
- .compatible = "mediatek,mt7622-ethsys",
|
|
- .data = clk_mt7622_ethsys_init,
|
|
- }, {
|
|
- .compatible = "mediatek,mt7622-sgmiisys",
|
|
- .data = clk_mt7622_sgmiisys_init,
|
|
- }, {
|
|
- /* sentinel */
|
|
- }
|
|
+ { .compatible = "mediatek,mt7622-ethsys", .data = ð_desc },
|
|
+ { .compatible = "mediatek,mt7622-sgmiisys", .data = &sgmii_desc },
|
|
+ { /* sentinel */ }
|
|
};
|
|
|
|
-static int clk_mt7622_eth_probe(struct platform_device *pdev)
|
|
-{
|
|
- int (*clk_init)(struct platform_device *);
|
|
- int r;
|
|
-
|
|
- clk_init = of_device_get_match_data(&pdev->dev);
|
|
- if (!clk_init)
|
|
- return -EINVAL;
|
|
-
|
|
- r = clk_init(pdev);
|
|
- if (r)
|
|
- dev_err(&pdev->dev,
|
|
- "could not register clock provider: %s: %d\n",
|
|
- pdev->name, r);
|
|
-
|
|
- return r;
|
|
-}
|
|
-
|
|
static struct platform_driver clk_mt7622_eth_drv = {
|
|
- .probe = clk_mt7622_eth_probe,
|
|
+ .probe = mtk_clk_simple_probe,
|
|
+ .remove = mtk_clk_simple_remove,
|
|
.driver = {
|
|
.name = "clk-mt7622-eth",
|
|
.of_match_table = of_match_clk_mt7622_eth,
|
|
--- a/drivers/clk/mediatek/clk-mt7622-hif.c
|
|
+++ b/drivers/clk/mediatek/clk-mt7622-hif.c
|
|
@@ -72,82 +72,27 @@ static const struct mtk_clk_rst_desc clk
|
|
.rst_bank_nr = ARRAY_SIZE(rst_ofs),
|
|
};
|
|
|
|
-static int clk_mt7622_ssusbsys_init(struct platform_device *pdev)
|
|
-{
|
|
- struct clk_hw_onecell_data *clk_data;
|
|
- struct device_node *node = pdev->dev.of_node;
|
|
- int r;
|
|
-
|
|
- clk_data = mtk_alloc_clk_data(CLK_SSUSB_NR_CLK);
|
|
-
|
|
- mtk_clk_register_gates(&pdev->dev, node, ssusb_clks,
|
|
- ARRAY_SIZE(ssusb_clks), clk_data);
|
|
-
|
|
- r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
|
- if (r)
|
|
- dev_err(&pdev->dev,
|
|
- "could not register clock provider: %s: %d\n",
|
|
- pdev->name, r);
|
|
-
|
|
- mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
|
|
-
|
|
- return r;
|
|
-}
|
|
-
|
|
-static int clk_mt7622_pciesys_init(struct platform_device *pdev)
|
|
-{
|
|
- struct clk_hw_onecell_data *clk_data;
|
|
- struct device_node *node = pdev->dev.of_node;
|
|
- int r;
|
|
-
|
|
- clk_data = mtk_alloc_clk_data(CLK_PCIE_NR_CLK);
|
|
-
|
|
- mtk_clk_register_gates(&pdev->dev, node, pcie_clks,
|
|
- ARRAY_SIZE(pcie_clks), clk_data);
|
|
-
|
|
- r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
|
- if (r)
|
|
- dev_err(&pdev->dev,
|
|
- "could not register clock provider: %s: %d\n",
|
|
- pdev->name, r);
|
|
-
|
|
- mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
|
|
+static const struct mtk_clk_desc ssusb_desc = {
|
|
+ .clks = ssusb_clks,
|
|
+ .num_clks = ARRAY_SIZE(ssusb_clks),
|
|
+ .rst_desc = &clk_rst_desc,
|
|
+};
|
|
|
|
- return r;
|
|
-}
|
|
+static const struct mtk_clk_desc pcie_desc = {
|
|
+ .clks = pcie_clks,
|
|
+ .num_clks = ARRAY_SIZE(pcie_clks),
|
|
+ .rst_desc = &clk_rst_desc,
|
|
+};
|
|
|
|
static const struct of_device_id of_match_clk_mt7622_hif[] = {
|
|
- {
|
|
- .compatible = "mediatek,mt7622-pciesys",
|
|
- .data = clk_mt7622_pciesys_init,
|
|
- }, {
|
|
- .compatible = "mediatek,mt7622-ssusbsys",
|
|
- .data = clk_mt7622_ssusbsys_init,
|
|
- }, {
|
|
- /* sentinel */
|
|
- }
|
|
+ { .compatible = "mediatek,mt7622-pciesys", .data = &pcie_desc },
|
|
+ { .compatible = "mediatek,mt7622-ssusbsys", .data = &ssusb_desc },
|
|
+ { /* sentinel */ }
|
|
};
|
|
|
|
-static int clk_mt7622_hif_probe(struct platform_device *pdev)
|
|
-{
|
|
- int (*clk_init)(struct platform_device *);
|
|
- int r;
|
|
-
|
|
- clk_init = of_device_get_match_data(&pdev->dev);
|
|
- if (!clk_init)
|
|
- return -EINVAL;
|
|
-
|
|
- r = clk_init(pdev);
|
|
- if (r)
|
|
- dev_err(&pdev->dev,
|
|
- "could not register clock provider: %s: %d\n",
|
|
- pdev->name, r);
|
|
-
|
|
- return r;
|
|
-}
|
|
-
|
|
static struct platform_driver clk_mt7622_hif_drv = {
|
|
- .probe = clk_mt7622_hif_probe,
|
|
+ .probe = mtk_clk_simple_probe,
|
|
+ .remove = mtk_clk_simple_remove,
|
|
.driver = {
|
|
.name = "clk-mt7622-hif",
|
|
.of_match_table = of_match_clk_mt7622_hif,
|
|
--- a/drivers/clk/mediatek/clk-mt7629-hif.c
|
|
+++ b/drivers/clk/mediatek/clk-mt7629-hif.c
|
|
@@ -67,82 +67,27 @@ static const struct mtk_clk_rst_desc clk
|
|
.rst_bank_nr = ARRAY_SIZE(rst_ofs),
|
|
};
|
|
|
|
-static int clk_mt7629_ssusbsys_init(struct platform_device *pdev)
|
|
-{
|
|
- struct clk_hw_onecell_data *clk_data;
|
|
- struct device_node *node = pdev->dev.of_node;
|
|
- int r;
|
|
-
|
|
- clk_data = mtk_alloc_clk_data(CLK_SSUSB_NR_CLK);
|
|
-
|
|
- mtk_clk_register_gates(&pdev->dev, node, ssusb_clks,
|
|
- ARRAY_SIZE(ssusb_clks), clk_data);
|
|
-
|
|
- r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
|
- if (r)
|
|
- dev_err(&pdev->dev,
|
|
- "could not register clock provider: %s: %d\n",
|
|
- pdev->name, r);
|
|
-
|
|
- mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
|
|
-
|
|
- return r;
|
|
-}
|
|
-
|
|
-static int clk_mt7629_pciesys_init(struct platform_device *pdev)
|
|
-{
|
|
- struct clk_hw_onecell_data *clk_data;
|
|
- struct device_node *node = pdev->dev.of_node;
|
|
- int r;
|
|
-
|
|
- clk_data = mtk_alloc_clk_data(CLK_PCIE_NR_CLK);
|
|
-
|
|
- mtk_clk_register_gates(&pdev->dev, node, pcie_clks,
|
|
- ARRAY_SIZE(pcie_clks), clk_data);
|
|
-
|
|
- r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
|
- if (r)
|
|
- dev_err(&pdev->dev,
|
|
- "could not register clock provider: %s: %d\n",
|
|
- pdev->name, r);
|
|
-
|
|
- mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
|
|
+static const struct mtk_clk_desc ssusb_desc = {
|
|
+ .clks = ssusb_clks,
|
|
+ .num_clks = ARRAY_SIZE(ssusb_clks),
|
|
+ .rst_desc = &clk_rst_desc,
|
|
+};
|
|
|
|
- return r;
|
|
-}
|
|
+static const struct mtk_clk_desc pcie_desc = {
|
|
+ .clks = pcie_clks,
|
|
+ .num_clks = ARRAY_SIZE(pcie_clks),
|
|
+ .rst_desc = &clk_rst_desc,
|
|
+};
|
|
|
|
static const struct of_device_id of_match_clk_mt7629_hif[] = {
|
|
- {
|
|
- .compatible = "mediatek,mt7629-pciesys",
|
|
- .data = clk_mt7629_pciesys_init,
|
|
- }, {
|
|
- .compatible = "mediatek,mt7629-ssusbsys",
|
|
- .data = clk_mt7629_ssusbsys_init,
|
|
- }, {
|
|
- /* sentinel */
|
|
- }
|
|
+ { .compatible = "mediatek,mt7629-pciesys", .data = &pcie_desc },
|
|
+ { .compatible = "mediatek,mt7629-ssusbsys", .data = &ssusb_desc },
|
|
+ { /* sentinel */ }
|
|
};
|
|
|
|
-static int clk_mt7629_hif_probe(struct platform_device *pdev)
|
|
-{
|
|
- int (*clk_init)(struct platform_device *);
|
|
- int r;
|
|
-
|
|
- clk_init = of_device_get_match_data(&pdev->dev);
|
|
- if (!clk_init)
|
|
- return -EINVAL;
|
|
-
|
|
- r = clk_init(pdev);
|
|
- if (r)
|
|
- dev_err(&pdev->dev,
|
|
- "could not register clock provider: %s: %d\n",
|
|
- pdev->name, r);
|
|
-
|
|
- return r;
|
|
-}
|
|
-
|
|
static struct platform_driver clk_mt7629_hif_drv = {
|
|
- .probe = clk_mt7629_hif_probe,
|
|
+ .probe = mtk_clk_simple_probe,
|
|
+ .remove = mtk_clk_simple_remove,
|
|
.driver = {
|
|
.name = "clk-mt7629-hif",
|
|
.of_match_table = of_match_clk_mt7629_hif,
|