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abc17bf306
Define nvmem-cells and convert mtd-mac-address to nvmem implementation. The conversion is done with an automated script. Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
282 lines
4.5 KiB
Plaintext
282 lines
4.5 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "ar7100.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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aliases {
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led-boot = &led_diag;
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led-failsafe = &led_diag;
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led-upgrade = &led_diag;
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};
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extosc: ref {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-output-names = "ref";
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clock-frequency = <40000000>;
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};
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leds {
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compatible = "gpio-leds";
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led_diag: diag {
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label = "red:diag";
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gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
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};
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};
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ath9k-leds {
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compatible = "gpio-leds";
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band2g_a {
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label = "amber:band2g";
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gpios = <&ath9k0 1 GPIO_ACTIVE_LOW>;
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};
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usb {
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label = "green:usb";
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gpios = <&ath9k0 3 GPIO_ACTIVE_LOW>;
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trigger-sources = <&usb_ohci_port>, <&usb_ehci_port>;
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linux,default-trigger = "usbport";
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};
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band2g_g {
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label = "green:band2g";
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gpios = <&ath9k0 5 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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band5g_g {
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label = "green:band5g";
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gpios = <&ath9k1 1 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1tpt";
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};
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router {
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label = "green:router";
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gpios = <&ath9k1 3 GPIO_ACTIVE_LOW>;
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};
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movie_engine {
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label = "blue:movie_engine";
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gpios = <&ath9k1 4 GPIO_ACTIVE_LOW>;
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};
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band5g_a {
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label = "amber:band5g";
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gpios = <&ath9k1 5 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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usb {
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linux,code = <BTN_2>;
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gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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aoss {
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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router_auto {
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linux,code = <BTN_6>;
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linux,input-type = <EV_SW>;
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gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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router_off {
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linux,code = <BTN_5>;
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linux,input-type = <EV_SW>;
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gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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movie_engine {
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linux,code = <BTN_7>;
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linux,input-type = <EV_SW>;
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gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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};
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gpio-export {
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compatible = "gpio-export";
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gpio_usb_power {
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gpio-export,name = "buffalo:power:usb";
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gpio-export,output = <1>;
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gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
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};
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};
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flash {
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compatible = "mtd-concat";
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devices = <&flash0 &flash1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0000000 0x0040000>;
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read-only;
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};
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partition@40000 {
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label = "u-boot-env";
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reg = <0x0040000 0x0010000>;
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read-only;
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};
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art: partition@50000 {
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label = "art";
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reg = <0x0050000 0x0010000>;
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read-only;
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};
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partition@60000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x0060000 0x1f90000>;
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};
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partition@1ff0000 {
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label = "user_property";
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reg = <0x1ff0000 0x0010000>;
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read-only;
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};
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};
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};
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};
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&usb_phy {
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status = "okay";
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};
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&usb1 {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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usb_ohci_port: port@1 {
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reg = <1>;
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#trigger-source-cells = <0>;
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};
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};
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&usb2 {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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usb_ehci_port: port@1 {
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reg = <1>;
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#trigger-source-cells = <0>;
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};
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};
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&pcie0 {
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status = "okay";
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ath9k0: wifi@0,11 {
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compatible = "pci168c,0029";
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reg = <0x8800 0 0 0 0>;
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qca,no-eeprom;
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#gpio-cells = <2>;
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gpio-controller;
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};
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ath9k1: wifi@0,12 {
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compatible = "pci168c,0029";
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reg = <0x9000 0 0 0 0>;
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qca,no-eeprom;
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#gpio-cells = <2>;
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gpio-controller;
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};
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};
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&pll {
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clocks = <&extosc>;
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};
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&spi {
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status = "okay";
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flash0: flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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m25p,fast-read;
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};
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flash1: flash@1 {
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compatible = "jedec,spi-nor";
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reg = <1>;
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spi-max-frequency = <50000000>;
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m25p,fast-read;
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};
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};
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&mdio0 {
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status = "okay";
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phy4: ethernet-phy@4 {
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reg = <4>;
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phy-mode = "rgmii";
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};
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};
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ð0 {
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status = "okay";
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nvmem-cells = <&macaddr_art_120c>;
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nvmem-cell-names = "mac-address";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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ð1 {
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status = "okay";
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nvmem-cells = <&macaddr_art_520c>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <1>;
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phy-handle = <&phy4>;
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};
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&art {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_art_120c: macaddr@120c {
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reg = <0x120c 0x6>;
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};
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macaddr_art_520c: macaddr@520c {
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reg = <0x520c 0x6>;
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};
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};
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