openwrt/target/linux/ath79/dts/qca9561_tplink_archer-c5x.dtsi
David Bauer 946ffe470d ath79: add support for Archer C58/C59 v1
This commit adds support for the Archer C58 v1 and C59 v1, previously
supported in the ar71xx target.

CPU:   Qualcomm QCA9561
RAM:   64M (C58) / 128M (C59)
FLASH: 8M (C58) / 16M (C59)
WiFi:  QCA9561 bgn 3x3:3
       QCA9888 nac 2x2:2
LED:   Power, WiFi 2.4, WiFi 5, WAN green, WAN amber, LAN, WPS
       Only C59: USB
BTN:   WPS, WiFi, Reset

Installation
------------

Via Web-UI:
Update factory image via Web-UI.

Via TFTP:
Rename factory image to "tp_recovery.bin" and place it in the root-dir
of your tftp server. Configure to listen on 192.168.0.66. Power up the
router while holding down the reset-button. The router will flash itself
and reboot.

Note: For TFTP, you might need a switch between router and computer, as
link establishment might take to long.

Signed-off-by: David Bauer <mail@david-bauer.net>
2018-11-26 12:05:45 +01:00

99 lines
1.7 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca956x.dtsi"
/ {
compatible = "tplink,archer-c5x", "qca,qca9560";
chosen {
bootargs = "console=ttyS0,115200n8";
};
led_spi {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
gpio-sck = <&gpio 18 GPIO_ACTIVE_HIGH>;
gpio-mosi = <&gpio 17 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
num-chipselects = <1>;
led_gpio: led_gpio@0 {
compatible = "fairchild,74hc595";
reg = <0>;
gpio-controller;
#gpio-cells = <2>;
registers-number = <1>;
spi-max-frequency = <10000000>;
};
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <100>;
wps_button {
label = "WPS button";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
};
wifi_button {
label = "WiFi button";
linux,code = <KEY_RFKILL>;
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
};
reset_button {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
};
};
gpio-export {
compatible = "gpio-export";
gpio_shift_register_oe {
gpio-export,name = "tp-link:oe:sr";
gpio-export,output = <0>;
gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
};
gpio_shift_register_reset {
gpio-export,name = "tp-link:reset:sr";
gpio-export,output = <1>;
gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
};
};
};
&uart {
status = "okay";
};
&gpio {
status = "okay";
};
&pcie {
status = "okay";
};
&eth0 {
phy-mode = "mii";
phy-handle = <&swphy0>;
gmac-config {
device = <&gmac>;
switch-phy-addr-swap = <1>;
switch-phy-swap = <1>;
};
};