mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-26 00:41:17 +00:00
e4ce3109f2
The node pinctrl0 is already set up in the SOC DTSI files, but defined again as member of pinctrl in most of the device DTS(I) files. This patch removes this redundancy for the entire ramips target. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
152 lines
2.3 KiB
Plaintext
152 lines
2.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
/dts-v1/;
|
|
|
|
#include "mt7620n.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
/ {
|
|
compatible = "dlink,dwr-922-e2", "ralink,mt7620n-soc";
|
|
model = "D-Link DWR-922 E2";
|
|
|
|
aliases {
|
|
led-boot = &sstrengthg;
|
|
led-failsafe = &sstrengthg;
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
|
|
wps {
|
|
label = "wps";
|
|
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_WPS_BUTTON>;
|
|
};
|
|
|
|
reset {
|
|
label = "reset";
|
|
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
led-boot = &sstrengthg;
|
|
|
|
sms {
|
|
label = "dwr-922-e2:green:sms";
|
|
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
lan {
|
|
label = "dwr-922-e2:green:lan";
|
|
gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
sstrengthg: sstrengthg {
|
|
label = "dwr-922-e2:green:sigstrength";
|
|
gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
sstrengthr {
|
|
label = "dwr-922-e2:red:sigstrength";
|
|
gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
4g {
|
|
label = "dwr-922-e2:green:4g";
|
|
gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
3g {
|
|
label = "dwr-922-e2:green:3g";
|
|
gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wifi {
|
|
label = "dwr-922-e2:green:wifi";
|
|
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
gpio_export {
|
|
compatible = "gpio-export";
|
|
#size-cells = <0>;
|
|
|
|
lte_modem_enable {
|
|
gpio-export,name = "lte_modem_enable";
|
|
gpio-export,output = <1>;
|
|
gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&gpio1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpio2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpio3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&spi0 {
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <10000000>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "jboot";
|
|
reg = <0x0 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@10000 {
|
|
compatible = "amit,jimage";
|
|
label = "firmware";
|
|
reg = <0x10000 0xfe0000>;
|
|
};
|
|
|
|
config: partition@ff0000 {
|
|
label = "config";
|
|
reg = <0xff0000 0x10000>;
|
|
read-only;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
ðernet {
|
|
port@4 {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&state_default {
|
|
default {
|
|
ralink,group = "spi refclk", "i2c", "ephy", "wled";
|
|
ralink,function = "gpio";
|
|
};
|
|
};
|