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a8d4d71c41
As usual these patches were extracted from the raspberry pi repo: https://github.com/raspberrypi/linux/commits/rpi-4.4.y Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
701 lines
20 KiB
Diff
701 lines
20 KiB
Diff
From 2cf8e02af4645b90aa63f8cdbd0cb4403e2bee8f Mon Sep 17 00:00:00 2001
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From: Fraser <github@frasersdev.net>
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Date: Tue, 23 Feb 2016 10:04:37 +1100
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Subject: [PATCH 157/232] Aux SPI 1&2 implementation
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Adds aux spi 1 & 2 devices to compatible raspberry PIs.
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* Minor config of the driver build environment to ensure they get built
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for CONFIG_ARCH_BCM2708 & CONFIG_ARCH_BCM2709 devices.
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* Adds the aux spi driver into the defconfigs as a module.
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* Adds the auxiliary and spi1/2 devices into the device tree in a
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disabled state
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* Provides decide tree overlays which enables the devices and gives
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users a degree of control over how they are setup.
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---
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arch/arm/boot/dts/bcm2708_common.dtsi | 34 ++++++++-
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arch/arm/boot/dts/overlays/Makefile | 6 ++
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arch/arm/boot/dts/overlays/README | 99 +++++++++++++++++++++++++
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arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts | 57 ++++++++++++++
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arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts | 69 +++++++++++++++++
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arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts | 81 ++++++++++++++++++++
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arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts | 57 ++++++++++++++
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arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts | 69 +++++++++++++++++
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arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts | 81 ++++++++++++++++++++
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arch/arm/configs/bcm2709_defconfig | 1 +
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arch/arm/configs/bcmrpi_defconfig | 1 +
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drivers/clk/bcm/Makefile | 2 +-
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drivers/spi/Kconfig | 2 +-
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13 files changed, 556 insertions(+), 3 deletions(-)
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create mode 100644 arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
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--- a/arch/arm/boot/dts/bcm2708_common.dtsi
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+++ b/arch/arm/boot/dts/bcm2708_common.dtsi
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@@ -1,3 +1,4 @@
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+#include <dt-bindings/clock/bcm2835-aux.h>
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#include "skeleton.dtsi"
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/ {
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@@ -5,6 +6,7 @@
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aliases {
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audio = &audio;
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+ aux = &aux;
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sound = &sound;
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soc = &soc;
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dma = &dma;
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@@ -19,6 +21,8 @@
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spi0 = &spi0;
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i2c0 = &i2c0;
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uart1 = &uart1;
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+ spi1 = &spi1;
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+ spi2 = &spi2;
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mmc = &mmc;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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@@ -186,6 +190,14 @@
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status = "disabled";
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};
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+ aux: aux@0x7e215004 {
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+ compatible = "brcm,bcm2835-aux";
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+ #clock-cells = <1>;
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+ reg = <0x7e215000 0x8>;
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+ clocks = <&clk_core>;
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+ status = "disabled";
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+ };
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+
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uart1: uart@7e215040 {
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compatible = "brcm,bcm2835-aux-uart", "ns16550";
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reg = <0x7e215040 0x40>;
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@@ -194,7 +206,27 @@
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reg-shift = <2>;
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no-loopback-test;
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status = "disabled";
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- };
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+ };
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+
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+ spi1: spi@7e215080 {
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+ compatible = "brcm,bcm2835-aux-spi";
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+ reg = <0x7e215080 0x40>, <0x7e215000 0x8>;
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+ interrupts = <1 29>;
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+ clocks = <&aux BCM2835_AUX_CLOCK_SPI1>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ status = "disabled";
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+ };
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+
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+ spi2: spi@7e2150C0 {
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+ compatible = "brcm,bcm2835-aux-spi";
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+ reg = <0x7e2150C0 0x40>, <0x7e215000 0x8>;
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+ interrupts = <1 29>;
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+ clocks = <&aux BCM2835_AUX_CLOCK_SPI2>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ status = "disabled";
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+ };
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mmc: mmc@7e300000 {
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compatible = "brcm,bcm2835-mmc";
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--- a/arch/arm/boot/dts/overlays/Makefile
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+++ b/arch/arm/boot/dts/overlays/Makefile
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@@ -57,6 +57,12 @@ dtb-$(RPI_DT_OVERLAYS) += sdtweak-overla
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dtb-$(RPI_DT_OVERLAYS) += smi-dev-overlay.dtb
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dtb-$(RPI_DT_OVERLAYS) += smi-nand-overlay.dtb
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dtb-$(RPI_DT_OVERLAYS) += smi-overlay.dtb
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+dtb-$(RPI_DT_OVERLAYS) += spi1-1cs-overlay.dtb
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+dtb-$(RPI_DT_OVERLAYS) += spi1-2cs-overlay.dtb
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+dtb-$(RPI_DT_OVERLAYS) += spi1-3cs-overlay.dtb
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+dtb-$(RPI_DT_OVERLAYS) += spi2-1cs-overlay.dtb
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+dtb-$(RPI_DT_OVERLAYS) += spi2-2cs-overlay.dtb
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+dtb-$(RPI_DT_OVERLAYS) += spi2-3cs-overlay.dtb
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dtb-$(RPI_DT_OVERLAYS) += spi-gpio35-39-overlay.dtb
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dtb-$(RPI_DT_OVERLAYS) += tinylcd35-overlay.dtb
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dtb-$(RPI_DT_OVERLAYS) += uart1-overlay.dtb
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--- a/arch/arm/boot/dts/overlays/README
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+++ b/arch/arm/boot/dts/overlays/README
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@@ -713,6 +713,105 @@ Load: dtoverlay=spi-gpio35-39
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Params: <None>
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+Name: spi1-1cs
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+Info: Enables spi1 with a single chip select (CS) line and associated spidev
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+ dev node. The gpio pin number for the CS line and spidev device node
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+ creation are configurable.
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+ N.B.: spi1 is only accessible on devices with a 40pin header, eg:
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+ A+, B+, Zero and PI2 B; as well as the Compute Module.
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+Load: dtoverlay=spi1-1cs,<param>=<val>
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+Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
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+ cs0_spidev Set to 'disabled' to stop the creation of a
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+ userspace device node /dev/spidev1.0 (default
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+ is 'okay' or enabled).
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+
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+
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+Name: spi1-2cs
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+Info: Enables spi1 with two chip select (CS) lines and associated spidev
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+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
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+ creation are configurable.
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+ N.B.: spi1 is only accessible on devices with a 40pin header, eg:
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+ A+, B+, Zero and PI2 B; as well as the Compute Module.
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+Load: dtoverlay=spi1-2cs,<param>=<val>
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+Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
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+ cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
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+ cs0_spidev Set to 'disabled' to stop the creation of a
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+ userspace device node /dev/spidev1.0 (default
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+ is 'okay' or enabled).
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+ cs1_spidev Set to 'disabled' to stop the creation of a
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+ userspace device node /dev/spidev1.1 (default
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+ is 'okay' or enabled).
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+
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+
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+Name: spi1-3cs
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+Info: Enables spi1 with three chip select (CS) lines and associated spidev
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+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
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+ creation are configurable.
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+ N.B.: spi1 is only accessible on devices with a 40pin header, eg:
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+ A+, B+, Zero and PI2 B; as well as the Compute Module.
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+Load: dtoverlay=spi1-3cs,<param>=<val>
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+Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
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+ cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
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+ cs2_pin GPIO pin for CS2 (default 16 - BCM SPI1_CE2).
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+ cs0_spidev Set to 'disabled' to stop the creation of a
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+ userspace device node /dev/spidev1.0 (default
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+ is 'okay' or enabled).
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+ cs1_spidev Set to 'disabled' to stop the creation of a
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+ userspace device node /dev/spidev1.1 (default
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+ is 'okay' or enabled).
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+ cs2_spidev Set to 'disabled' to stop the creation of a
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+ userspace device node /dev/spidev1.2 (default
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+ is 'okay' or enabled).
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+
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+
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+Name: spi2-1cs
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+Info: Enables spi2 with a single chip select (CS) line and associated spidev
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+ dev node. The gpio pin number for the CS line and spidev device node
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+ creation are configurable.
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+ N.B.: spi2 is only accessible with the Compute Module.
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+Load: dtoverlay=spi2-1cs,<param>=<val>
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+Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
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+ cs0_spidev Set to 'disabled' to stop the creation of a
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+ userspace device node /dev/spidev2.0 (default
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+ is 'okay' or enabled).
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+
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+
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+Name: spi2-2cs
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+Info: Enables spi2 with two chip select (CS) lines and associated spidev
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+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
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+ creation are configurable.
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+ N.B.: spi2 is only accessible with the Compute Module.
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+Load: dtoverlay=spi2-2cs,<param>=<val>
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+Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
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+ cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
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+ cs0_spidev Set to 'disabled' to stop the creation of a
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+ userspace device node /dev/spidev2.0 (default
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+ is 'okay' or enabled).
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+ cs1_spidev Set to 'disabled' to stop the creation of a
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+ userspace device node /dev/spidev2.1 (default
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+ is 'okay' or enabled).
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+
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+
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+Name: spi2-3cs
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+Info: Enables spi2 with three chip select (CS) lines and associated spidev
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+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
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+ creation are configurable.
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+ N.B.: spi2 is only accessible with the Compute Module.
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+Load: dtoverlay=spi2-3cs,<param>=<val>
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+Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
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+ cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
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+ cs2_pin GPIO pin for CS2 (default 45 - BCM SPI2_CE2).
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+ cs0_spidev Set to 'disabled' to stop the creation of a
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+ userspace device node /dev/spidev2.0 (default
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+ is 'okay' or enabled).
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+ cs1_spidev Set to 'disabled' to stop the creation of a
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+ userspace device node /dev/spidev2.1 (default
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+ is 'okay' or enabled).
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+ cs2_spidev Set to 'disabled' to stop the creation of a
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+ userspace device node /dev/spidev2.2 (default
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+ is 'okay' or enabled).
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+
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+
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Name: tinylcd35
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Info: 3.5" Color TFT Display by www.tinylcd.com
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Options: Touch, RTC, keypad
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--- /dev/null
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+++ b/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
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@@ -0,0 +1,57 @@
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+/dts-v1/;
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+/plugin/;
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+
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+
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+/ {
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+ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
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+
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+ fragment@0 {
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+ target = <&gpio>;
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+ __overlay__ {
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+ spi1_pins: spi1_pins {
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+ brcm,pins = <19 20 21>;
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+ brcm,function = <3>; /* alt4 */
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+ };
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+
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+ spi1_cs_pins: spi1_cs_pins {
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+ brcm,pins = <18>;
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+ brcm,function = <1>; /* output */
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+ };
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+ };
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+ };
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+
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+ fragment@1 {
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+ target = <&spi1>;
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+ frag1: __overlay__ {
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+ /* needed to avoid dtc warning */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
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+ cs-gpios = <&gpio 18 1>;
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+ status = "okay";
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+
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+ spidev1_0: spidev@0 {
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+ compatible = "spidev";
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+ reg = <0>; /* CE0 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ spi-max-frequency = <500000>;
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+ status = "okay";
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+ };
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+ };
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+ };
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+
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+ fragment@2 {
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+ target = <&aux>;
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+ __overlay__ {
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+ status = "okay";
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+ };
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+ };
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+
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+ __overrides__ {
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+ cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
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+ <&frag1>,"cs-gpios:4";
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+ cs0_spidev = <&spidev1_0>,"status";
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+ };
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
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@@ -0,0 +1,69 @@
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+/dts-v1/;
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+/plugin/;
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+
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+
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+/ {
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+ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
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+
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+ fragment@0 {
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+ target = <&gpio>;
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+ __overlay__ {
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+ spi1_pins: spi1_pins {
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+ brcm,pins = <19 20 21>;
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+ brcm,function = <3>; /* alt4 */
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+ };
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+
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+ spi1_cs_pins: spi1_cs_pins {
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+ brcm,pins = <18 17>;
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+ brcm,function = <1>; /* output */
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+ };
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+ };
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+ };
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+
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+ fragment@1 {
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+ target = <&spi1>;
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+ frag1: __overlay__ {
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+ /* needed to avoid dtc warning */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
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+ cs-gpios = <&gpio 18 1>, <&gpio 17 1>;
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+ status = "okay";
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+
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+ spidev1_0: spidev@0 {
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+ compatible = "spidev";
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+ reg = <0>; /* CE0 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ spi-max-frequency = <500000>;
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+ status = "okay";
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+ };
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+
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+ spidev1_1: spidev@1 {
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+ compatible = "spidev";
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+ reg = <1>; /* CE1 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ spi-max-frequency = <500000>;
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+ status = "okay";
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+ };
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+ };
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+ };
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+
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+ fragment@2 {
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+ target = <&aux>;
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+ __overlay__ {
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+ status = "okay";
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+ };
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+ };
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+
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+ __overrides__ {
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+ cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
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+ <&frag1>,"cs-gpios:4";
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+ cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
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+ <&frag1>,"cs-gpios:16";
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+ cs0_spidev = <&spidev1_0>,"status";
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+ cs1_spidev = <&spidev1_1>,"status";
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+ };
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
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@@ -0,0 +1,81 @@
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+/dts-v1/;
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+/plugin/;
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+
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+
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+/ {
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+ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
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+
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+ fragment@0 {
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+ target = <&gpio>;
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+ __overlay__ {
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+ spi1_pins: spi1_pins {
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+ brcm,pins = <19 20 21>;
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+ brcm,function = <3>; /* alt4 */
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+ };
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+
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+ spi1_cs_pins: spi1_cs_pins {
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+ brcm,pins = <18 17 16>;
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+ brcm,function = <1>; /* output */
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+ };
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+ };
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+ };
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+
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+ fragment@1 {
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+ target = <&spi1>;
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+ frag1: __overlay__ {
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+ /* needed to avoid dtc warning */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
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+ cs-gpios = <&gpio 18 1>, <&gpio 17 1>, <&gpio 16 1>;
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+ status = "okay";
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+
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+ spidev1_0: spidev@0 {
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+ compatible = "spidev";
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+ reg = <0>; /* CE0 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ spi-max-frequency = <500000>;
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+ status = "okay";
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+ };
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+
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+ spidev1_1: spidev@1 {
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+ compatible = "spidev";
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+ reg = <1>; /* CE1 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ spi-max-frequency = <500000>;
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+ status = "okay";
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+ };
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+
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+ spidev1_2: spidev@2 {
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+ compatible = "spidev";
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+ reg = <2>; /* CE2 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ spi-max-frequency = <500000>;
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|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&aux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
|
|
+ <&frag1>,"cs-gpios:16";
|
|
+ cs2_pin = <&spi1_cs_pins>,"brcm,pins:8",
|
|
+ <&frag1>,"cs-gpios:28";
|
|
+ cs0_spidev = <&spidev1_0>,"status";
|
|
+ cs1_spidev = <&spidev1_1>,"status";
|
|
+ cs2_spidev = <&spidev1_2>,"status";
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
|
|
@@ -0,0 +1,57 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ spi2_pins: spi2_pins {
|
|
+ brcm,pins = <40 41 42>;
|
|
+ brcm,function = <3>; /* alt4 */
|
|
+ };
|
|
+
|
|
+ spi2_cs_pins: spi2_cs_pins {
|
|
+ brcm,pins = <43>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi2>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
|
|
+ cs-gpios = <&gpio 43 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev2_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&aux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs0_spidev = <&spidev2_0>,"status";
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
|
|
@@ -0,0 +1,69 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ spi2_pins: spi2_pins {
|
|
+ brcm,pins = <40 41 42>;
|
|
+ brcm,function = <3>; /* alt4 */
|
|
+ };
|
|
+
|
|
+ spi2_cs_pins: spi2_cs_pins {
|
|
+ brcm,pins = <43 44>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi2>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
|
|
+ cs-gpios = <&gpio 43 1>, <&gpio 44 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev2_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ spidev2_1: spidev@1 {
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&aux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
|
|
+ <&frag1>,"cs-gpios:16";
|
|
+ cs0_spidev = <&spidev2_0>,"status";
|
|
+ cs1_spidev = <&spidev2_1>,"status";
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
|
|
@@ -0,0 +1,81 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ spi2_pins: spi2_pins {
|
|
+ brcm,pins = <40 41 42>;
|
|
+ brcm,function = <3>; /* alt4 */
|
|
+ };
|
|
+
|
|
+ spi2_cs_pins: spi2_cs_pins {
|
|
+ brcm,pins = <43 44 45>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi2>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
|
|
+ cs-gpios = <&gpio 43 1>, <&gpio 44 1>, <&gpio 45 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev2_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ spidev2_1: spidev@1 {
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ spidev2_2: spidev@2 {
|
|
+ compatible = "spidev";
|
|
+ reg = <2>; /* CE2 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&aux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
|
|
+ <&frag1>,"cs-gpios:16";
|
|
+ cs2_pin = <&spi2_cs_pins>,"brcm,pins:8",
|
|
+ <&frag1>,"cs-gpios:28";
|
|
+ cs0_spidev = <&spidev2_0>,"status";
|
|
+ cs1_spidev = <&spidev2_1>,"status";
|
|
+ cs2_spidev = <&spidev2_2>,"status";
|
|
+ };
|
|
+};
|
|
--- a/arch/arm/configs/bcm2709_defconfig
|
|
+++ b/arch/arm/configs/bcm2709_defconfig
|
|
@@ -601,6 +601,7 @@ CONFIG_I2C_BCM2708=m
|
|
CONFIG_I2C_GPIO=m
|
|
CONFIG_SPI=y
|
|
CONFIG_SPI_BCM2835=m
|
|
+CONFIG_SPI_BCM2835AUX=m
|
|
CONFIG_SPI_SPIDEV=y
|
|
CONFIG_PPS=m
|
|
CONFIG_PPS_CLIENT_LDISC=m
|
|
--- a/arch/arm/configs/bcmrpi_defconfig
|
|
+++ b/arch/arm/configs/bcmrpi_defconfig
|
|
@@ -593,6 +593,7 @@ CONFIG_I2C_BCM2708=m
|
|
CONFIG_I2C_GPIO=m
|
|
CONFIG_SPI=y
|
|
CONFIG_SPI_BCM2835=m
|
|
+CONFIG_SPI_BCM2835AUX=m
|
|
CONFIG_SPI_SPIDEV=y
|
|
CONFIG_PPS=m
|
|
CONFIG_PPS_CLIENT_LDISC=m
|
|
--- a/drivers/clk/bcm/Makefile
|
|
+++ b/drivers/clk/bcm/Makefile
|
|
@@ -4,7 +4,7 @@ obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281
|
|
obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o
|
|
obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
|
|
obj-$(CONFIG_ARCH_BCM2835)$(CONFIG_ARCH_BCM2708)$(CONFIG_ARCH_BCM2709) += clk-bcm2835.o
|
|
-obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835-aux.o
|
|
+obj-$(CONFIG_ARCH_BCM2835)$(CONFIG_ARCH_BCM2708)$(CONFIG_ARCH_BCM2709) += clk-bcm2835-aux.o
|
|
obj-$(CONFIG_COMMON_CLK_IPROC) += clk-ns2.o
|
|
obj-$(CONFIG_ARCH_BCM_CYGNUS) += clk-cygnus.o
|
|
obj-$(CONFIG_ARCH_BCM_NSP) += clk-nsp.o
|
|
--- a/drivers/spi/Kconfig
|
|
+++ b/drivers/spi/Kconfig
|
|
@@ -90,7 +90,7 @@ config SPI_BCM2835
|
|
|
|
config SPI_BCM2835AUX
|
|
tristate "BCM2835 SPI auxiliary controller"
|
|
- depends on ARCH_BCM2835 || COMPILE_TEST
|
|
+ depends on ARCH_BCM2835 || ARCH_BCM2708 || ARCH_BCM2709 || COMPILE_TEST
|
|
depends on GPIOLIB
|
|
help
|
|
This selects a driver for the Broadcom BCM2835 SPI aux master.
|