openwrt/target/linux/starfive/patches-6.1/1021-dt-bindings-reset-Add-starfive-jh7100-audrst-binding.patch
Zoltan HERPAI 4070e2a64c starfive: add new target for StarFive JH7100/7110 SoC
This target adds support for the StarFive JH7100 and JH7110 SoCs, based on
6.1, as well as a couple boards equipped with these.

Specifications:

SoCs:

JH7100:
 - StarFive JH7100 dual-core RISC-V (U74, RC64GC)
 - additional monitoring (S7) and control (E24) cores
 - 2Mb L2 cache

JH7110:
 - StarFive JH7110 quad-core RISC-V (U74, RV64GC)
 - additional monitoring (S7) and control (E24) cores
 - 2Mb L2 cache

Boards:

VisionFive1:
 - JH7100 @ 1GHz
 - Memory: 8Gb LPDDR4
 - 4x USB3.0
 - 1x GBit ethernet
 - AMPak 6236 wifi / bluetooth
 - audio
 - powered via USB-C

VisionFive2:
 - JH7110 @ 1.5GHz
 - Memory: 2/4/8Gb DDR4
 - 2x Gbit ethernet
 - 2x USB3.0 / 2x USB2.0
 - eMMC / SDIO
 - various multimedia input/outputs (MIPI CSI, HDMI, audio)
 - M.2 key M slot
 - PoE support
 - powered via USB-C

Installation:
Standard SD-card installation via dd-ing the generated image to
an SD-card of at least 256Mb.

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
2024-03-10 18:21:46 +01:00

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1.4 KiB
Diff

From 9220294c675a111651ff12b2389a81f0935553fd Mon Sep 17 00:00:00 2001
From: Emil Renner Berthing <kernel@esmil.dk>
Date: Tue, 7 Dec 2021 21:48:51 +0100
Subject: [PATCH 1021/1024] dt-bindings: reset: Add starfive,jh7100-audrst
bindings
Add bindings for the audio reset controller on the StarFive JH7100
RISC-V SoC.
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
---
.../reset/starfive,jh7100-audrst.yaml | 38 +++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/starfive,jh7100-audrst.yaml
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/starfive,jh7100-audrst.yaml
@@ -0,0 +1,38 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/starfive,jh7100-audrst.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7100 SoC Audio Reset Controller Device Tree Bindings
+
+maintainers:
+ - Emil Renner Berthing <kernel@esmil.dk>
+
+properties:
+ compatible:
+ enum:
+ - starfive,jh7100-audrst
+
+ reg:
+ maxItems: 1
+
+ "#reset-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - "#reset-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ reset-controller@10490000 {
+ compatible = "starfive,jh7100-audrst";
+ reg = <0x10490000 0x10000>;
+ #reset-cells = <1>;
+ };
+
+...