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a703830806
v2022.01 has a regression that broke eMMC usage on most if not all Armada
SoC-s, thus breaking boards like uDPU which use eMMC for storage.
Fix it by backporting a recent upstream patch.
Fixes: 782d4c8306 ("uboot-mvebu: update to version 2022.01")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
65 lines
2.3 KiB
Diff
65 lines
2.3 KiB
Diff
From 0f3466f52fbacce67e147b9234e6323edff26a6d Mon Sep 17 00:00:00 2001
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From: Robert Marko <robert.marko@sartura.hr>
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Date: Fri, 11 Mar 2022 19:14:07 +0100
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Subject: [PATCH] mmc: xenon_sdhci: remove wait_dat0 SDHCI OP
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Generic SDHCI driver received support for checking the busy status by
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polling the DAT[0] level instead of waiting for the worst MMC switch time.
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Unfortunately, it appears that this does not work for Xenon controllers
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despite being a part of the standard SDHCI registers and the Armada 3720
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datasheet itself telling that BIT(20) is useful for detecting the DAT[0]
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busy signal.
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I have tried increasing the timeout value, but I have newer managed to
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catch DAT_LEVEL bits change from 0 at all.
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This issue appears to hit most if not all SoC-s supported by Xenon driver,
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at least A3720, A8040 and CN9130 have non working eMMC currently.
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So, until a better solution is found drop the wait_dat0 OP for Xenon.
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I was able to only test it on A3720, but it should work for others as well.
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Fixes: 40e6f52454fc ("drivers: mmc: Add wait_dat0 support for sdhci driver")
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Signed-off-by: Robert Marko <robert.marko@sartura.hr>
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Reviewed-by: Marek Behún <marek.behun@nic.cz>
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Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
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Reviewed-by: Stefan Roese <sr@denx.de>
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---
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drivers/mmc/xenon_sdhci.c | 7 ++++++-
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1 file changed, 6 insertions(+), 1 deletion(-)
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--- a/drivers/mmc/xenon_sdhci.c
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+++ b/drivers/mmc/xenon_sdhci.c
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@@ -439,6 +439,8 @@ static const struct sdhci_ops xenon_sdhc
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.set_ios_post = xenon_sdhci_set_ios_post
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};
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+static struct dm_mmc_ops xenon_mmc_ops;
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+
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static int xenon_sdhci_probe(struct udevice *dev)
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{
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struct xenon_sdhci_plat *plat = dev_get_plat(dev);
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@@ -452,6 +454,9 @@ static int xenon_sdhci_probe(struct udev
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host->mmc->dev = dev;
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upriv->mmc = host->mmc;
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+ xenon_mmc_ops = sdhci_ops;
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+ xenon_mmc_ops.wait_dat0 = NULL;
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+
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/* Set quirks */
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host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_32BIT_DMA_ADDR;
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@@ -568,7 +573,7 @@ U_BOOT_DRIVER(xenon_sdhci_drv) = {
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.id = UCLASS_MMC,
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.of_match = xenon_sdhci_ids,
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.of_to_plat = xenon_sdhci_of_to_plat,
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- .ops = &sdhci_ops,
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+ .ops = &xenon_mmc_ops,
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.bind = xenon_sdhci_bind,
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.probe = xenon_sdhci_probe,
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.remove = xenon_sdhci_remove,
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