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a6678accbd
All RTL SoCs addresss PHYs via their port number, which is mapped to an SMI address. Add support for configuring this mapping via the .dts on all SoCs apart from the 839x, where the mapping to the 64 ports is fixed. Signed-off-by: Birger Koblitz <git@birger-koblitz.de> |
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| clocksource | ||
| gpio | ||
| net | ||