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1315058bda
CFE seems to leave the SPI flash mapping in an invalid state after loading the kernel on some reference boards, so fix it up on boot. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 39273
207 lines
5.9 KiB
Diff
207 lines
5.9 KiB
Diff
From 5ed5b5e9614fa5b02da699ab565af76c7e63d64d Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jogo@openwrt.org>
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Date: Mon, 7 Jan 2013 17:45:39 +0100
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Subject: [PATCH 72/72] 446-BCM63XX-add-a-fixup-for-rt2x00-devices
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---
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arch/mips/bcm63xx/Makefile | 2 +-
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arch/mips/bcm63xx/boards/board_bcm963xx.c | 17 ++++-
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arch/mips/bcm63xx/dev-flash.c | 2 +-
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arch/mips/bcm63xx/pci-rt2x00-fixup.c | 71 ++++++++++++++++++++
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.../include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 +-
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.../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 9 ++-
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.../include/asm/mach-bcm63xx/pci_rt2x00_fixup.h | 9 +++
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7 files changed, 104 insertions(+), 8 deletions(-)
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create mode 100644 arch/mips/bcm63xx/pci-rt2x00-fixup.c
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create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h
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--- a/arch/mips/bcm63xx/Makefile
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+++ b/arch/mips/bcm63xx/Makefile
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@@ -2,7 +2,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o
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setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
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dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
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dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
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- pci-ath9k-fixup.o usb-common.o
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+ pci-ath9k-fixup.o pci-rt2x00-fixup.o usb-common.o
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obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
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obj-y += boards/
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--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
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+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
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@@ -34,6 +34,7 @@
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#include <bcm63xx_dev_usb_usbd.h>
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#include <board_bcm963xx.h>
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#include <pci_ath9k_fixup.h>
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+#include <pci_rt2x00_fixup.h>
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#include <uapi/linux/bcm933xx_hcs.h>
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#include <uapi/linux/bcm963xx_tag.h>
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@@ -1047,9 +1048,19 @@ int __init board_register_devices(void)
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}
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/* register any fixups */
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- for (i = 0; i < board.has_caldata; i++)
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- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
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- board.caldata[i].endian_check, board.caldata[i].led_pin);
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+ for (i = 0; i < board.has_caldata; i++) {
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+ switch (board.caldata[i].vendor) {
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+ case PCI_VENDOR_ID_ATHEROS:
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+ pci_enable_ath9k_fixup(board.caldata[i].slot,
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+ board.caldata[i].caldata_offset, board.caldata[i].endian_check,
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+ board.caldata[i].led_pin);
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+ break;
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+ case PCI_VENDOR_ID_RALINK:
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+ pci_enable_rt2x00_fixup(board.caldata[i].slot,
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+ board.caldata[i].eeprom);
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+ break;
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+ }
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+ }
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return 0;
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}
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--- a/arch/mips/bcm63xx/dev-flash.c
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+++ b/arch/mips/bcm63xx/dev-flash.c
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@@ -193,7 +193,7 @@ void __init bcm63xx_flash_detect(void)
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}
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}
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-int __init bcm63xx_flash_register(int num_caldata, struct ath9k_caldata *caldata)
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+int __init bcm63xx_flash_register(int num_caldata, struct bcm63xx_caldata *caldata)
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{
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u32 val;
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unsigned int i;
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--- /dev/null
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+++ b/arch/mips/bcm63xx/pci-rt2x00-fixup.c
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@@ -0,0 +1,72 @@
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+/*
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+ * Broadcom BCM63XX RT2x00 EEPROM fixup helper.
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+ *
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+ * Copyright (C) 2012 Álvaro Fernández Rojas <noltari@gmail.com>
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+ *
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+ * Based on
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+ *
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+ * Broadcom BCM63XX Ath9k EEPROM fixup helper.
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+ *
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+ * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ */
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+
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+#include <linux/if_ether.h>
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+#include <linux/pci.h>
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+#include <linux/platform_device.h>
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+#include <linux/rt2x00_platform.h>
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+
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+#include <bcm63xx_nvram.h>
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+#include <pci_rt2x00_fixup.h>
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+
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+struct rt2x00_fixup {
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+ unsigned slot;
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+ u8 mac[ETH_ALEN];
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+ struct rt2x00_platform_data pdata;
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+};
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+
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+static int rt2x00_num_fixups;
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+static struct rt2x00_fixup rt2x00_fixups[2] = {
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+ {
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+ .slot = 255,
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+ },
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+ {
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+ .slot = 255,
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+ },
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+};
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+
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+static void rt2x00_pci_fixup(struct pci_dev *dev)
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+{
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+ unsigned i;
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+ struct rt2x00_platform_data *pdata = NULL;
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+
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+ for (i = 0; i < rt2x00_num_fixups; i++) {
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+ if (rt2x00_fixups[i].slot != PCI_SLOT(dev->devfn))
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+ continue;
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+
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+ pdata = &rt2x00_fixups[i].pdata;
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+ break;
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+ }
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+
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+ dev->dev.platform_data = pdata;
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+}
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+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_RALINK, PCI_ANY_ID, rt2x00_pci_fixup);
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+
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+void __init pci_enable_rt2x00_fixup(unsigned slot, char* eeprom)
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+{
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+ if (rt2x00_num_fixups >= ARRAY_SIZE(rt2x00_fixups))
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+ return;
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+
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+ rt2x00_fixups[rt2x00_num_fixups].slot = slot;
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+ rt2x00_fixups[rt2x00_num_fixups].pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
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+
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+ if (bcm63xx_nvram_get_mac_address(rt2x00_fixups[rt2x00_num_fixups].mac))
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+ return;
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+
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+ rt2x00_fixups[rt2x00_num_fixups].pdata.mac_address = rt2x00_fixups[rt2x00_num_fixups].mac;
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+ rt2x00_num_fixups++;
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+}
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+
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--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
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@@ -11,7 +11,7 @@ enum {
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void bcm63xx_flash_detect(void);
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-int __init bcm63xx_flash_register(int num_caldata, struct ath9k_caldata *caldata);
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+int __init bcm63xx_flash_register(int num_caldata, struct bcm63xx_caldata *caldata);
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int bcm63xx_flash_get_type(void);
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--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
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@@ -9,6 +9,7 @@
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#include <bcm63xx_dev_usb_usbd.h>
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#include <bcm63xx_dev_dsp.h>
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#include <pci_ath9k_fixup.h>
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+#include <pci_rt2x00_fixup.h>
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/*
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* flash mapping
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@@ -16,11 +17,15 @@
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#define BCM963XX_CFE_VERSION_OFFSET 0x570
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#define BCM963XX_NVRAM_OFFSET 0x580
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-struct ath9k_caldata {
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+struct bcm63xx_caldata {
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+ unsigned int vendor;
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unsigned int slot;
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u32 caldata_offset;
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+ /* Atheros */
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unsigned int endian_check:1;
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int led_pin;
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+ /* Ralink */
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+ char* eeprom;
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};
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/*
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@@ -45,7 +50,7 @@ struct board_info {
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unsigned int has_caldata:2;
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/* wifi calibration data config */
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- struct ath9k_caldata caldata[2];
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+ struct bcm63xx_caldata caldata[2];
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/* ethernet config */
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struct bcm63xx_enet_platform_data enet0;
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--- /dev/null
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+++ b/arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h
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@@ -0,0 +1,9 @@
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+#ifndef _PCI_RT2X00_FIXUP
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+#define _PCI_RT2X00_FIXUP
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+
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+#define PCI_VENDOR_ID_RALINK 0x1814
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+
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+void pci_enable_rt2x00_fixup(unsigned slot, char* eeprom) __init;
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+
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+#endif /* _PCI_RT2X00_FIXUP */
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+
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