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e4db63fd64
The nand subtarget is not working yet. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 33983
110 lines
2.7 KiB
Diff
110 lines
2.7 KiB
Diff
--- a/drivers/mtd/devices/m25p80.c
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+++ b/drivers/mtd/devices/m25p80.c
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@@ -100,6 +100,7 @@ struct m25p {
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u16 addr_width;
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u8 erase_opcode;
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u8 *command;
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+ size_t max_read_len;
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};
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static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd)
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@@ -349,6 +350,7 @@ static int m25p80_read(struct mtd_info *
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struct m25p *flash = mtd_to_m25p(mtd);
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struct spi_transfer t[2];
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struct spi_message m;
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+ loff_t ofs;
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pr_debug("%s: %s from 0x%08x, len %zd\n", dev_name(&flash->spi->dev),
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__func__, (u32)from, len);
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@@ -364,19 +366,10 @@ static int m25p80_read(struct mtd_info *
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t[0].len = m25p_cmdsz(flash) + FAST_READ_DUMMY_BYTE;
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spi_message_add_tail(&t[0], &m);
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- t[1].rx_buf = buf;
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- t[1].len = len;
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spi_message_add_tail(&t[1], &m);
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mutex_lock(&flash->lock);
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- /* Wait till previous write/erase is done. */
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- if (wait_till_ready(flash)) {
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- /* REVISIT status return?? */
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- mutex_unlock(&flash->lock);
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- return 1;
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- }
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-
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/* FIXME switch to OPCODE_FAST_READ. It's required for higher
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* clocks; and at this writing, every chip this driver handles
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* supports that opcode.
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@@ -384,11 +377,44 @@ static int m25p80_read(struct mtd_info *
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/* Set up the write data buffer. */
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flash->command[0] = OPCODE_READ;
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- m25p_addr2cmd(flash, from, flash->command);
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- spi_sync(flash->spi, &m);
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+ ofs = 0;
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+ while (len) {
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+ size_t readlen;
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+ size_t done;
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+ int ret;
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+
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+ ret = wait_till_ready(flash);
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+ if (ret) {
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+ mutex_unlock(&flash->lock);
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+ return 1;
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+ }
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+
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+ if (flash->max_read_len > 0 &&
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+ flash->max_read_len < len)
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+ readlen = flash->max_read_len;
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+ else
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+ readlen = len;
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+
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+ t[1].rx_buf = buf + ofs;
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+ t[1].len = readlen;
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+
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+ m25p_addr2cmd(flash, from + ofs, flash->command);
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+
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+ spi_sync(flash->spi, &m);
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- *retlen = m.actual_length - m25p_cmdsz(flash) - FAST_READ_DUMMY_BYTE;
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+ done = m.actual_length - m25p_cmdsz(flash) -
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+ FAST_READ_DUMMY_BYTE;
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+ if (done != readlen) {
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+ mutex_unlock(&flash->lock);
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+ return 1;
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+ }
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+
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+ ofs += done;
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+ len -= done;
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+ }
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+
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+ *retlen = ofs;
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mutex_unlock(&flash->lock);
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@@ -899,6 +925,12 @@ static int __devinit m25p_probe(struct s
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flash->mtd._erase = m25p80_erase;
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flash->mtd._read = m25p80_read;
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+ if (data && data->max_read_len) {
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+ flash->max_read_len = data->max_read_len;
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+ dev_warn(&spi->dev, "max_read_len set to %d bytes\n",
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+ flash->max_read_len);
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+ }
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+
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/* sst flash chips use AAI word program */
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if (JEDEC_MFR(info->jedec_id) == CFI_MFR_SST)
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flash->mtd._write = sst_write;
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--- a/include/linux/spi/flash.h
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+++ b/include/linux/spi/flash.h
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@@ -25,6 +25,7 @@ struct flash_platform_data {
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char *type;
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+ size_t max_read_len;
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/* we'll likely add more ... use JEDEC IDs, etc */
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};
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