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f003d732d7
Refreshed all patches. Removed upstreamed: - 031-v5.0-MIPS-BCM47XX-Setup-struct-device-for-the-SoC.patch - 142-jffs2-Fix-use-of-uninitialized-delayed_work-lockdep-.patch Removed upstreamed hunk in: - 800-bcma-get-SoC-device-struct-copy-its-DMA-params-to-th.patch Compile-tested on: cns3xxx Runtime-tested on: cns3xxx Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
32 lines
1.1 KiB
Diff
32 lines
1.1 KiB
Diff
From f8ac3d3472a8dc99c8647a637611d146d88be8cb Mon Sep 17 00:00:00 2001
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From: Linus Walleij <linus.walleij@linaro.org>
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Date: Tue, 9 Oct 2018 10:09:14 +0200
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Subject: [PATCH 01/18] pinctrl: gemini: Mask and set properly
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The code was written under the assumption that the
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regmap_update_bits() would mask the bits in the mask and
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set the bits in the value.
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It missed the points that it will not set bits in the value
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unless these are also masked in the mask. Set value bits
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that are not in the mask will simply be ignored.
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Fixes: 06351d133dea ("pinctrl: add a Gemini SoC pin controller")
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Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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---
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drivers/pinctrl/pinctrl-gemini.c | 3 ++-
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1 file changed, 2 insertions(+), 1 deletion(-)
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--- a/drivers/pinctrl/pinctrl-gemini.c
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+++ b/drivers/pinctrl/pinctrl-gemini.c
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@@ -2184,7 +2184,8 @@ static int gemini_pmx_set_mux(struct pin
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func->name, grp->name);
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regmap_read(pmx->map, GLOBAL_MISC_CTRL, &before);
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- regmap_update_bits(pmx->map, GLOBAL_MISC_CTRL, grp->mask,
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+ regmap_update_bits(pmx->map, GLOBAL_MISC_CTRL,
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+ grp->mask | grp->value,
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grp->value);
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regmap_read(pmx->map, GLOBAL_MISC_CTRL, &after);
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