openwrt/target/linux/ramips/dts/mt7620a_head-weblink_hdrm200.dts
Adrian Schmutzler 48047b3a5c ramips/mt7620: Name DTS files based on scheme
As introduced with ath79, DTS files for ramips will now be labelled
soc_vendor_device.dts(i). With this change, DTS files can be
selected automatically without further manual links.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2019-07-10 17:36:29 +02:00

189 lines
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "head-weblink,hdrm200", "ralink,mt7620a-soc";
model = "Head Weblink HDRM200";
aliases {
led-boot = &led_system;
led-failsafe = &led_system;
led-running = &led_system;
led-upgrade = &led_system;
};
chosen {
bootargs = "console=ttyS1,57600";
};
leds {
compatible = "gpio-leds";
rssi {
label = "hdrm200:red:rssi";
gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
};
led_system: system {
label = "hdrm200:green:system";
gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
};
air {
label = "hdrm200:green:wifi";
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
wps {
label = "wps";
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
reset {
label = "reset";
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
firmware: partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0xfb0000>;
};
};
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&gpio3 {
status = "okay";
};
&sdhci {
status = "okay";
};
&ehci {
status = "okay";
};
&ohci {
status = "okay";
};
&ethernet {
status = "okay";
mtd-mac-address = <&factory 0x4>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
port@4 {
status = "okay";
phy-handle = <&phy4>;
phy-mode = "rgmii";
};
port@5 {
status = "okay";
phy-handle = <&phy5>;
phy-mode = "rgmii";
};
mdio-bus {
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "rgmii";
};
phy5: ethernet-phy@5 {
reg = <5>;
phy-mode = "rgmii";
};
};
};
&wmac {
ralink,mtd-eeprom = <&factory 0>;
};
&pinctrl {
state_default: pinctrl0 {
default {
ralink,group = "i2c", "uartf", "pa", "spi refclk",
"wled";
ralink,function = "gpio";
};
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&uart {
status = "okay";
};