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61 lines
1.8 KiB
Diff
61 lines
1.8 KiB
Diff
From 10073a205df269abcbd9c3fbc690a813827107ef Mon Sep 17 00:00:00 2001
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From: Matthew McClintock <mmcclint@codeaurora.org>
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Date: Tue, 28 Jun 2016 11:35:21 -0700
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Subject: watchdog: qcom: configure BARK time in addition to BITE time
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For certain parts and some versions of TZ, TZ will reset the chip
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when a BARK is triggered even though it was not configured here. So
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by default let's configure this BARK time as well.
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Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
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Reviewed-by: Guenter Roeck <linux@roeck-us.net>
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Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
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Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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---
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drivers/watchdog/qcom-wdt.c | 5 +++++
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1 file changed, 5 insertions(+)
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--- a/drivers/watchdog/qcom-wdt.c
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+++ b/drivers/watchdog/qcom-wdt.c
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@@ -24,6 +24,7 @@ enum wdt_reg {
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WDT_RST,
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WDT_EN,
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WDT_STS,
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+ WDT_BARK_TIME,
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WDT_BITE_TIME,
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};
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@@ -31,6 +32,7 @@ static const u32 reg_offset_data_apcs_tm
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[WDT_RST] = 0x38,
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[WDT_EN] = 0x40,
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[WDT_STS] = 0x44,
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+ [WDT_BARK_TIME] = 0x4C,
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[WDT_BITE_TIME] = 0x5C,
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};
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@@ -38,6 +40,7 @@ static const u32 reg_offset_data_kpss[]
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[WDT_RST] = 0x4,
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[WDT_EN] = 0x8,
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[WDT_STS] = 0xC,
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+ [WDT_BARK_TIME] = 0x10,
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[WDT_BITE_TIME] = 0x14,
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};
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@@ -66,6 +69,7 @@ static int qcom_wdt_start(struct watchdo
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writel(0, wdt_addr(wdt, WDT_EN));
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writel(1, wdt_addr(wdt, WDT_RST));
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+ writel(wdd->timeout * wdt->rate, wdt_addr(wdt, WDT_BARK_TIME));
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writel(wdd->timeout * wdt->rate, wdt_addr(wdt, WDT_BITE_TIME));
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writel(1, wdt_addr(wdt, WDT_EN));
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return 0;
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@@ -108,6 +112,7 @@ static int qcom_wdt_restart(struct watch
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writel(0, wdt_addr(wdt, WDT_EN));
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writel(1, wdt_addr(wdt, WDT_RST));
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+ writel(timeout, wdt_addr(wdt, WDT_BARK_TIME));
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writel(timeout, wdt_addr(wdt, WDT_BITE_TIME));
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writel(1, wdt_addr(wdt, WDT_EN));
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