openwrt/target/linux/lantiq/dts/FRITZ7360SL.dts
Mathias Kresin d65b1c815a lantiq: drop phy id specfic compatible string
With kernel commit 7630ea4bda18 ("Documentation: net: phy: improve
explanation when to specify the PHY ID") the purpose of using phy id
specific compatibles was clarified.

Remove the phy id specific compatibles since they are meant to be used
if the phy reports an incorrect or no phy id at all.

Reported-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Mathias Kresin <dev@kresin.me>
2017-10-07 20:15:03 +02:00

228 lines
4.3 KiB
Plaintext

/dts-v1/;
#include "vr9.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "FRITZ7360SL - 1&1 HomeServer";
chosen {
bootargs = "console=ttyLTQ0,115200";
};
aliases {
led-boot = &power_green;
led-failsafe = &power_red;
led-running = &power_green;
led-dsl = &info_green;
led-wifi = &wifi;
};
memory@0 {
reg = <0x0 0x8000000>;
};
fpi@10000000 {
localbus@0 {
nor-boot@0 {
compatible = "lantiq,nor";
bank-width = <2>;
reg = <0 0x0 0x1000000>;
#address-cells = <1>;
#size-cells = <1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
urlader: partition@0 {
label = "urlader";
reg = <0x00000 0x20000>;
read-only;
};
partition@20000 {
label = "firmware";
reg = <0x20000 0xf60000>;
};
partition@f80000 {
label = "tffs (1)";
reg = <0xf80000 0x40000>;
read-only;
};
partition@fc0000 {
label = "tffs (2)";
reg = <0xfc0000 0x40000>;
read-only;
};
};
};
};
gpio: pinmux@E100B10 {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinmux {
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
phy-rst {
lantiq,pins = "io37", "io44";
lantiq,pull = <0>;
lantiq,open-drain;
lantiq,output = <1>;
};
pcie-rst {
lantiq,pins = "io38";
lantiq,pull = <0>;
lantiq,output = <1>;
};
};
};
ifxhcd@E101000 {
status = "okay";
lantiq,portmask = <0x3>;
};
ifxhcd@E106000 {
status = "okay";
};
};
gphy-xrx200 {
compatible = "lantiq,phy-xrx200";
firmware = "lantiq/vr9_phy11g_a2x.bin";
phys = [ 00 01 ];
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <100>;
dect {
label = "dect";
gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_PHONE>;
};
wifi {
label = "wifi";
gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_WLAN>;
};
};
gpio-leds {
compatible = "gpio-leds";
power_green: power {
label = "fritz7360sl:green:power";
gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
default-state = "keep";
};
power_red: power2 {
label = "fritz7360sl:red:power";
gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
};
info_red {
label = "fritz7360sl:red:info";
gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
};
info_green: info_green {
label = "fritz7360sl:green:info";
gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
};
wifi: wifi {
label = "fritz7360sl:green:wlan";
gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
};
dect {
label = "fritz7360sl:green:dect";
gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
};
};
};
&eth0 {
lan: interface@0 {
compatible = "lantiq,xrx200-pdi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
mtd-mac-address = <&urlader 0xa91>;
mtd-mac-address-increment = <(-2)>;
lantiq,switch;
ethernet@0 {
compatible = "lantiq,xrx200-pdi-port";
reg = <0>;
phy-mode = "rmii";
phy-handle = <&phy0>;
};
ethernet@1 {
compatible = "lantiq,xrx200-pdi-port";
reg = <1>;
phy-mode = "rmii";
phy-handle = <&phy1>;
};
ethernet@2 {
compatible = "lantiq,xrx200-pdi-port";
reg = <2>;
phy-mode = "gmii";
phy-handle = <&phy11>;
};
ethernet@3 {
compatible = "lantiq,xrx200-pdi-port";
reg = <4>;
phy-mode = "gmii";
phy-handle = <&phy13>;
};
};
mdio@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "lantiq,xrx200-mdio";
phy0: ethernet-phy@0 {
reg = <0x00>;
compatible = "ethernet-phy-ieee802.3-c22";
reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
};
phy1: ethernet-phy@1 {
reg = <0x01>;
compatible = "ethernet-phy-ieee802.3-c22";
reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
};
phy11: ethernet-phy@11 {
reg = <0x11>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
phy13: ethernet-phy@13 {
reg = <0x13>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
};
};
&pcie0 {
pcie@0 {
reg = <0 0 0 0 0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
wifi@168c,002e {
compatible = "pci168c,002e";
reg = <0 0 0 0 0>;
qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
};
};
};