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008db6b970
All other SoC DTSI files have gpio enabled by default, only
ar9330/ar9331 disable it by default, only to have it enabled again
afterwards for each individual device.
So, do not disable it in the first place, and drop all device-specific
status statements afterwards.
Though this is a cosmetic commit, it might be a pitfall for
device-support backporters if missing. Since backporting it is trivial,
let's just do it.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit dc1280ef65)
216 lines
3.7 KiB
Plaintext
216 lines
3.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include <dt-bindings/clock/ath79-clk.h>
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#include "ath79.dtsi"
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/ {
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compatible = "qca,ar9330";
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "mips,mips24Kc";
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clocks = <&pll ATH79_CLK_CPU>;
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reg = <0>;
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};
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};
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chosen {
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bootargs = "console=ttyATH0,115200";
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};
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ahb {
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apb {
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ddr_ctrl: memory-controller@18000000 {
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compatible = "qca,ar7240-ddr-controller";
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reg = <0x18000000 0x100>;
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#qca,ddr-wb-channel-cells = <1>;
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};
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uart: uart@18020000 {
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compatible = "qca,ar9330-uart";
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reg = <0x18020000 0x14>;
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interrupts = <3>;
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clocks = <&pll ATH79_CLK_REF>;
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clock-names = "uart";
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status = "disabled";
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};
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gpio: gpio@18040000 {
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compatible = "qca,ar7100-gpio";
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reg = <0x18040000 0x34>;
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interrupts = <2>;
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ngpios = <30>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pinmux: pinmux@18040028 {
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compatible = "pinctrl-single";
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reg = <0x18040028 0x8>;
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pinctrl-single,bit-per-mux;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0x1>;
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#pinctrl-cells = <2>;
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jtag_disable_pins: pinmux_jtag_disable_pins {
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pinctrl-single,bits = <0x0 0x1 0x1>;
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};
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switch_led_disable_pins: pinmux_switch_led_disable_pins {
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pinctrl-single,bits = <0x0 0x0 0xf8>;
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};
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};
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pll: pll-controller@18050000 {
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compatible = "qca,ar9330-pll";
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reg = <0x18050000 0x100>;
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#clock-cells = <1>;
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};
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wdt: wdt@18060008 {
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compatible = "qca,ar7130-wdt";
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reg = <0x18060008 0x8>;
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interrupts = <4>;
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clocks = <&pll ATH79_CLK_AHB>;
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clock-names = "wdt";
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};
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rst: reset-controller@1806001c {
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compatible = "qca,ar7100-reset";
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reg = <0x1806001c 0x4>;
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#reset-cells = <1>;
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};
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};
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usb: usb@1b000000 {
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compatible = "chipidea,usb2";
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reg = <0x1b000000 0x200>;
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interrupts = <3>;
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resets = <&rst 5>;
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reset-names = "usb-host";
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phy-names = "usb-phy";
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phys = <&usb_phy>;
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status = "disabled";
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};
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spi: spi@1f000000 {
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compatible = "qca,ar7100-spi";
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reg = <0x1f000000 0x10>;
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clocks = <&pll ATH79_CLK_AHB>;
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clock-names = "ahb";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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gmac: gmac@18070000 {
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compatible = "qca,ar9330-gmac";
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reg = <0x18070000 0x4>;
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};
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wmac: wmac@18100000 {
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compatible = "qca,ar9330-wmac";
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reg = <0x18100000 0x20000>;
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interrupts = <2>;
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status = "disabled";
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};
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};
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usb_phy: usb-phy {
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compatible = "qca,ar7200-usb-phy";
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reset-names = "usb-phy", "usb-suspend-override";
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resets = <&rst 4>, <&rst 3>;
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#phy-cells = <0>;
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status = "disabled";
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};
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};
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&cpuintc {
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qca,ddr-wb-channel-interrupts = <2>, <3>;
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qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
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};
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ð0 {
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compatible = "qca,ar9330-eth", "syscon";
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pll-data = <0x00110000 0x00001099 0x00991099>;
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resets = <&rst 9>;
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reset-names = "mac";
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phy-mode = "mii";
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phy-handle = <&swphy4>;
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};
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&mdio1 {
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status = "okay";
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compatible = "qca,ar9330-mdio";
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resets = <&rst 23>;
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reset-names = "mdio";
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builtin-switch;
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builtin_switch: switch0@1f {
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compatible = "qca,ar7240sw";
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reg = <0x1f>;
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resets = <&rst 8>;
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reset-names = "switch";
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qca,mib-poll-interval = <500>;
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mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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swphy4: ethernet-phy@4 {
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reg = <4>;
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phy-mode = "mii";
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};
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};
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};
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};
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ð1 {
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compatible = "qca,ar9330-eth", "syscon";
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pll-data = <0x00110000 0x00001099 0x00991099>;
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phy-mode = "gmii";
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resets = <&rst 13>;
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reset-names = "mac";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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