openwrt/target/linux/ath79/dts/qca9563_dlink_dir-8x9-a1.dtsi
Shiji Yang 0ffbef9317 ath79: add support for D-Link DIR-859 A3
Specifications:
  SOC:      QCA9563 775 MHz + QCA9880
  Switch:   QCA8337N-AL3C
  RAM:      Winbond W9751G6KB-25 64 MiB
  Flash:    Winbond W25Q128FVSG 16 MiB
  WLAN:     Wi-Fi4 2.4 GHz 3*3 + 5 GHz 3*3
  LAN:      LAN ports *4
  WAN:      WAN port *1
  Buttons:  reset *1 + wps *1
  LEDs: ethernet *5, power, wlan, wps

MAC Address:
  use      address               source1          source2
  label    40:9b:xx:xx:xx:3c     lan && wlan      u-boot,env@ethaddr
  lan      40:9b:xx:xx:xx:3c     devdata@0x3f     $label
  wan      40:9b:xx:xx:xx:3f     devdata@0x8f     $label + 3
  wlan2g   40:9b:xx:xx:xx:3c     devdata@0x5b     $label
  wlan5g   40:9b:xx:xx:xx:3e     devdata@0x76     $label + 2

Install via Web UI:
  Apply factory image in the stock firmware's Web UI.

Install via Emergency Room Mode:
  DIR-859 A1 will enter recovery mode when the system fails to boot
  or press reset button for about 10 seconds.

  First, set computer IP to 192.168.0.5 and Gateway to 192.168.0.1.
  Then we can open http://192.168.0.1 in the web browser to upload
  OpenWrt factory image or stock firmware. Some modern browsers may
  need to turn on compatibility mode.

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
2023-05-22 14:45:03 +02:00

153 lines
2.7 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca956x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
keys {
compatible = "gpio-keys";
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&pcie {
status = "okay";
ath10k: wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&calibration_ath10k>, <&macaddr_devdata_94>;
nvmem-cell-names = "calibration", "mac-address-ascii";
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bootloader";
reg = <0x000000 0x040000>;
read-only;
};
bdcfg: partition@40000 {
compatible = "u-boot,env";
label = "bdcfg";
reg = <0x040000 0x010000>;
};
partition@50000 {
label = "devdata";
reg = <0x050000 0x010000>;
read-only;
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_devdata_94: macaddr@94 {
reg = <0x94 0x11>;
};
macaddr_devdata_b0: macaddr@b0 {
reg = <0xb0 0x11>;
};
};
partition@60000 {
label = "devconf";
reg = <0x060000 0x010000>;
read-only;
};
partition@70000 {
compatible = "seama";
label = "firmware";
reg = <0x070000 0xf80000>;
};
partition@ff0000 {
label = "art";
reg = <0xff0000 0x010000>;
read-only;
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
calibration_ath9k: calibration@1000 {
reg = <0x1000 0x440>;
};
calibration_ath10k: calibration@5000 {
reg = <0x5000 0x844>;
};
};
};
};
};
&mdio0 {
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
phy-mode = "sgmii";
qca,mib-poll-interval = <500>;
reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
qca,ar8327-initvals = <
0x04 0x00080080 /* PORT0 PAD MODE CTRL */
0x10 0x81000080 /* POWER_ON_STRAP */
0x50 0xcc35cc35 /* LED_CTRL0 */
0x54 0xcb37cb37 /* LED_CTRL1 */
0x58 0x00000000 /* LED_CTRL2 */
0x5c 0x00f3cf00 /* LED_CTRL3 */
0x7c 0x0000007e /* PORT0_STATUS */
>;
};
};
&eth0 {
status = "okay";
pll-data = <0x03000101 0x00000101 0x00001919>;
phy-mode = "sgmii";
phy-handle = <&phy0>;
};
&wmac {
status = "okay";
nvmem-cells = <&calibration_ath9k>, <&macaddr_devdata_b0>;
nvmem-cell-names = "calibration", "mac-address-ascii";
};