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https://github.com/openwrt/openwrt.git
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a39dca7ead
Changelog: https://cdn.kernel.org/pub/linux/kernel/v5.x/ChangeLog-5.15.138
Removed upstreamed:
generic/backport-5.15/819-v6.6-0018-nvmem-imx-correct-nregs-for-i.MX6SLL.patch[1]
generic/backport-5.15/819-v6.6-0019-nvmem-imx-correct-nregs-for-i.MX6UL.patch[2]
generic/backport-5.15/819-v6.6-0020-nvmem-imx-correct-nregs-for-i.MX6ULL.patch[3]
All other patches automatically rebased.
1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.138&id=6e22bf6f00d593b0a7e0b2f418fde89317424671
2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.138&id=6efd498009b987a92f57f3bdae476f0503364fb7
3. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.138&id=6e22bf6f00d593b0a7e0b2f418fde89317424671
Build system: x86_64
Build-tested: ramips/tplink_archer-a6-v3
Run-tested: ramips/tplink_archer-a6-v3
Signed-off-by: John Audia <therealgraysky@proton.me>
[Refreshed on top of OpenWrt 23.05]
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 573c8c3d78)
60 lines
1.9 KiB
Diff
60 lines
1.9 KiB
Diff
From d0ff7a1bcfe886cab1a237895b08ac51ecfe10e7 Mon Sep 17 00:00:00 2001
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From: Tim Harvey <tharvey@gateworks.com>
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Date: Wed, 10 Apr 2019 08:00:47 -0700
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Subject: [PATCH 04/12] PCI: add quirk for Gateworks PLX PEX860x switch with
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GPIO PERST#
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Gateworks boards use PLX PEX860x switches where downstream ports
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have their PERST# driven from the PEX GPIO.
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Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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---
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drivers/pci/quirks.c | 32 ++++++++++++++++++++++++++++++++
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1 file changed, 32 insertions(+)
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--- a/drivers/pci/quirks.c
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+++ b/drivers/pci/quirks.c
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@@ -25,6 +25,7 @@
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#include <linux/ktime.h>
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#include <linux/mm.h>
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#include <linux/nvme.h>
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+#include <linux/of.h>
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#include <linux/platform_data/x86/apple.h>
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#include <linux/pm_runtime.h>
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#include <linux/suspend.h>
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@@ -5858,3 +5859,34 @@ static void nvidia_ion_ahci_fixup(struct
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pdev->dev_flags |= PCI_DEV_FLAGS_HAS_MSI_MASKING;
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x0ab8, nvidia_ion_ahci_fixup);
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+
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+#ifdef CONFIG_PCI_HOST_THUNDER_PEM
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+/*
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+ * fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High
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+ * as they are used for slots1-7 PERST#
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+ */
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+static void newport_pciesw_early_fixup(struct pci_dev *dev)
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+{
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+ u32 dw;
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+
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+ if (!of_machine_is_compatible("gw,newport"))
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+ return;
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+
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+ if (dev->devfn != 0)
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+ return;
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+
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+ dev_info(&dev->dev, "de-asserting PERST#\n");
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+ pci_read_config_dword(dev, 0x62c, &dw);
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+ dw |= 0xaaa8; /* GPIO1-7 outputs */
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+ pci_write_config_dword(dev, 0x62c, dw);
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+
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+ pci_read_config_dword(dev, 0x644, &dw);
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+ dw |= 0xfe; /* GPIO1-7 output high */
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+ pci_write_config_dword(dev, 0x644, dw);
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+
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+ msleep(100);
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+}
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+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8609, newport_pciesw_early_fixup);
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+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8606, newport_pciesw_early_fixup);
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+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8604, newport_pciesw_early_fixup);
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+#endif /* CONFIG_PCI_HOST_THUNDER_PEM */
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