mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-27 01:11:14 +00:00
06bb4a5018
Define nvmem-cells and convert mtd-mac-address to nvmem implementation. The conversion is done with an automated script. Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
182 lines
2.5 KiB
Plaintext
182 lines
2.5 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only
|
|
|
|
#include "mt7620a.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
/ {
|
|
compatible = "lb-link,bl-w1200", "ralink,mt7620a-soc";
|
|
model = "LB-Link BL-W1200";
|
|
|
|
aliases {
|
|
led-boot = &led_wps;
|
|
led-failsafe = &led_wps;
|
|
led-upgrade = &led_wps;
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
|
|
reset_wps {
|
|
label = "reset_wps";
|
|
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
led_wps: wps {
|
|
label = "green:wps";
|
|
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&gpio1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&spi0 {
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <50000000>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x0 0x30000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@30000 {
|
|
label = "config";
|
|
reg = <0x30000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
factory: partition@40000 {
|
|
label = "factory";
|
|
reg = <0x40000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@50000 {
|
|
compatible = "denx,uimage";
|
|
label = "firmware";
|
|
reg = <0x50000 0x7b0000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&state_default {
|
|
gpio {
|
|
groups = "uartf", "spi refclk";
|
|
function = "gpio";
|
|
};
|
|
};
|
|
|
|
ðernet {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&rgmii2_pins &mdio_pins>;
|
|
|
|
nvmem-cells = <&macaddr_factory_28>;
|
|
nvmem-cell-names = "mac-address";
|
|
|
|
mediatek,portmap = "wllll";
|
|
|
|
port@5 {
|
|
status = "okay";
|
|
mediatek,fixed-link = <1000 1 1 1>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
|
|
mdio-bus {
|
|
status = "okay";
|
|
|
|
ethernet-phy@0 {
|
|
reg = <0>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
|
|
ethernet-phy@1 {
|
|
reg = <1>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
|
|
ethernet-phy@2 {
|
|
reg = <2>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
|
|
ethernet-phy@3 {
|
|
reg = <3>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
|
|
ethernet-phy@4 {
|
|
reg = <4>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
|
|
ethernet-phy@1f {
|
|
reg = <0x1f>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
};
|
|
};
|
|
|
|
&gsw {
|
|
mediatek,ephy-base = /bits/ 8 <12>;
|
|
};
|
|
|
|
&wmac {
|
|
ralink,mtd-eeprom = <&factory 0x0>;
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie0 {
|
|
wifi@0,0 {
|
|
compatible = "mediatek,mt76";
|
|
reg = <0x0000 0 0 0 0>;
|
|
ieee80211-freq-limit = <5000000 6000000>;
|
|
mediatek,mtd-eeprom = <&factory 0x8000>;
|
|
|
|
led {
|
|
led-sources = <2>;
|
|
led-active-low;
|
|
};
|
|
};
|
|
};
|
|
|
|
&ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
&factory {
|
|
compatible = "nvmem-cells";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
macaddr_factory_28: macaddr@28 {
|
|
reg = <0x28 0x6>;
|
|
};
|
|
};
|