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8299d1f057
Rebased RPi foundation patches on linux 5.10.59, removed applied and reverted patches, wireless patches and defconfig patches. bcm2708: boot tested on RPi B+ v1.2 bcm2709: boot tested on RPi 4B v1.1 4G bcm2711: boot tested on RPi 4B v1.1 4G Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
61 lines
2.0 KiB
Diff
61 lines
2.0 KiB
Diff
From ecaf713a6535e49f1eb4374f6241421e8e61d407 Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Tue, 14 Apr 2020 15:47:09 +0100
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Subject: [PATCH] media: i2c: ov9281: fix mclk issue when probe
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multiple camera.
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Takes the ov9281 part only from the Rockchip's patch.
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Change-Id: I30e833baf2c1bb07d6d87ddb3b00759ab45a90e4
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Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
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---
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drivers/media/i2c/ov9281.c | 16 ++++++++--------
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1 file changed, 8 insertions(+), 8 deletions(-)
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--- a/drivers/media/i2c/ov9281.c
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+++ b/drivers/media/i2c/ov9281.c
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@@ -3,6 +3,7 @@
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* ov9281 driver
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*
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* Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
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+ * V0.0X01.0X02 fix mclk issue when probe multiple camera.
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*/
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#include <linux/clk.h>
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@@ -22,7 +23,7 @@
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#include <media/v4l2-subdev.h>
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#include <linux/pinctrl/consumer.h>
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-#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x0)
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+#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x2)
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#ifndef V4L2_CID_DIGITAL_GAIN
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#define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
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@@ -676,6 +677,12 @@ static int __ov9281_power_on(struct ov92
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dev_err(dev, "could not set pins\n");
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}
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+ ret = clk_set_rate(ov9281->xvclk, OV9281_XVCLK_FREQ);
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+ if (ret < 0)
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+ dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
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+ if (clk_get_rate(ov9281->xvclk) != OV9281_XVCLK_FREQ)
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+ dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
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+
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ret = clk_prepare_enable(ov9281->xvclk);
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if (ret < 0) {
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dev_err(dev, "Failed to enable xvclk\n");
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@@ -1008,13 +1015,6 @@ static int ov9281_probe(struct i2c_clien
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dev_err(dev, "Failed to get xvclk\n");
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return -EINVAL;
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}
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- ret = clk_set_rate(ov9281->xvclk, OV9281_XVCLK_FREQ);
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- if (ret < 0) {
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- dev_err(dev, "Failed to set xvclk rate (24MHz)\n");
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- return ret;
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- }
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- if (clk_get_rate(ov9281->xvclk) != OV9281_XVCLK_FREQ)
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- dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
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ov9281->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
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if (IS_ERR(ov9281->reset_gpio))
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