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e3a1e78cd8
It compiles but *doesn't* boot so it isn't enabled yet. Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
33 lines
1.2 KiB
Diff
33 lines
1.2 KiB
Diff
From 56098be85d19cd56b59d7b3854ea035cc8cb9e95 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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Date: Tue, 8 Dec 2020 11:49:50 +0100
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Subject: [PATCH 3/4] arm64: dts: broadcom: bcm4908: use proper NAND binding
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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BCM4908 has controller that needs different IRQ handling just like the
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BCM63138. Describe it properly.
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On Linux this change fixes:
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brcmstb_nand ff801800.nand: timeout waiting for command 0x9
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brcmstb_nand ff801800.nand: intfc status d0000000
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
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+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
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@@ -164,7 +164,7 @@
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nand@1800 {
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#address-cells = <1>;
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#size-cells = <0>;
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- compatible = "brcm,brcmnand-v7.1", "brcm,brcmnand";
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+ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
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reg = <0x1800 0x600>, <0x2000 0x10>;
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reg-names = "nand", "nand-int-base";
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
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