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4070e2a64c
This target adds support for the StarFive JH7100 and JH7110 SoCs, based on 6.1, as well as a couple boards equipped with these. Specifications: SoCs: JH7100: - StarFive JH7100 dual-core RISC-V (U74, RC64GC) - additional monitoring (S7) and control (E24) cores - 2Mb L2 cache JH7110: - StarFive JH7110 quad-core RISC-V (U74, RV64GC) - additional monitoring (S7) and control (E24) cores - 2Mb L2 cache Boards: VisionFive1: - JH7100 @ 1GHz - Memory: 8Gb LPDDR4 - 4x USB3.0 - 1x GBit ethernet - AMPak 6236 wifi / bluetooth - audio - powered via USB-C VisionFive2: - JH7110 @ 1.5GHz - Memory: 2/4/8Gb DDR4 - 2x Gbit ethernet - 2x USB3.0 / 2x USB2.0 - eMMC / SDIO - various multimedia input/outputs (MIPI CSI, HDMI, audio) - M.2 key M slot - PoE support - powered via USB-C Installation: Standard SD-card installation via dd-ing the generated image to an SD-card of at least 256Mb. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
102 lines
3.2 KiB
Diff
102 lines
3.2 KiB
Diff
From cad740398f4cb6604abf1ddcc70121b2634ac233 Mon Sep 17 00:00:00 2001
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From: Samin Guo <samin.guo@starfivetech.com>
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Date: Fri, 3 Mar 2023 16:49:31 +0800
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Subject: [PATCH 046/122] riscv: dts: starfive: jh7110: Add ethernet device
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nodes
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Add JH7110 ethernet device node to support gmac driver for the JH7110
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RISC-V SoC.
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Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
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Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
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Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
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---
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arch/riscv/boot/dts/starfive/jh7110.dtsi | 69 ++++++++++++++++++++++++
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1 file changed, 69 insertions(+)
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--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
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+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
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@@ -230,6 +230,13 @@
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#clock-cells = <0>;
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};
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+ stmmac_axi_setup: stmmac-axi-config {
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+ snps,lpi_en;
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+ snps,wr_osr_lmt = <4>;
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+ snps,rd_osr_lmt = <4>;
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+ snps,blen = <256 128 64 32 0 0 0>;
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+ };
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+
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tdm_ext: tdm-ext-clock {
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compatible = "fixed-clock";
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clock-output-names = "tdm_ext";
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@@ -489,6 +496,68 @@
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#gpio-cells = <2>;
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};
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+ gmac0: ethernet@16030000 {
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+ compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
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+ reg = <0x0 0x16030000 0x0 0x10000>;
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+ clocks = <&aoncrg JH7110_AONCLK_GMAC0_AXI>,
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+ <&aoncrg JH7110_AONCLK_GMAC0_AHB>,
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+ <&syscrg JH7110_SYSCLK_GMAC0_PTP>,
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+ <&aoncrg JH7110_AONCLK_GMAC0_TX_INV>,
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+ <&syscrg JH7110_SYSCLK_GMAC0_GTXC>;
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+ clock-names = "stmmaceth", "pclk", "ptp_ref",
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+ "tx", "gtx";
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+ resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,
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+ <&aoncrg JH7110_AONRST_GMAC0_AHB>;
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+ reset-names = "stmmaceth", "ahb";
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+ interrupts = <7>, <6>, <5>;
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+ interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
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+ rx-fifo-depth = <2048>;
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+ tx-fifo-depth = <2048>;
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+ snps,multicast-filter-bins = <64>;
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+ snps,perfect-filter-entries = <8>;
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+ snps,fixed-burst;
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+ snps,no-pbl-x8;
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+ snps,force_thresh_dma_mode;
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+ snps,axi-config = <&stmmac_axi_setup>;
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+ snps,tso;
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+ snps,en-tx-lpi-clockgating;
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+ snps,txpbl = <16>;
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+ snps,rxpbl = <16>;
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+ starfive,syscon = <&aon_syscon 0xc 0x12>;
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+ status = "disabled";
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+ };
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+
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+ gmac1: ethernet@16040000 {
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+ compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
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+ reg = <0x0 0x16040000 0x0 0x10000>;
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+ clocks = <&syscrg JH7110_SYSCLK_GMAC1_AXI>,
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+ <&syscrg JH7110_SYSCLK_GMAC1_AHB>,
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+ <&syscrg JH7110_SYSCLK_GMAC1_PTP>,
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+ <&syscrg JH7110_SYSCLK_GMAC1_TX_INV>,
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+ <&syscrg JH7110_SYSCLK_GMAC1_GTXC>;
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+ clock-names = "stmmaceth", "pclk", "ptp_ref",
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+ "tx", "gtx";
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+ resets = <&syscrg JH7110_SYSRST_GMAC1_AXI>,
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+ <&syscrg JH7110_SYSRST_GMAC1_AHB>;
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+ reset-names = "stmmaceth", "ahb";
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+ interrupts = <78>, <77>, <76>;
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+ interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
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+ rx-fifo-depth = <2048>;
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+ tx-fifo-depth = <2048>;
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+ snps,multicast-filter-bins = <64>;
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+ snps,perfect-filter-entries = <8>;
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+ snps,fixed-burst;
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+ snps,no-pbl-x8;
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+ snps,force_thresh_dma_mode;
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+ snps,axi-config = <&stmmac_axi_setup>;
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+ snps,tso;
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+ snps,en-tx-lpi-clockgating;
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+ snps,txpbl = <16>;
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+ snps,rxpbl = <16>;
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+ starfive,syscon = <&sys_syscon 0x90 0x2>;
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+ status = "disabled";
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+ };
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+
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aoncrg: clock-controller@17000000 {
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compatible = "starfive,jh7110-aoncrg";
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reg = <0x0 0x17000000 0x0 0x10000>;
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