mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-25 00:11:13 +00:00
0a51f13145
The backported patch is broken, since kernel 6.1 has not
'include/linux/firmware' directory yet.
Fix the include to the correct path.
Fixes: #14115
Fixes: 52c365f055 ("kernel: backport v6.6 nvmem changes")
Signed-off-by: Andrey VOLKOV <andrey@volkov.fr>
[ improve commit description and title ]
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
153 lines
4.4 KiB
Diff
153 lines
4.4 KiB
Diff
From 0a9ec38c47c1ca4528aa058e2b9ea61901a7e632 Mon Sep 17 00:00:00 2001
|
|
From: Komal Bajaj <quic_kbajaj@quicinc.com>
|
|
Date: Tue, 1 Aug 2023 12:10:25 +0530
|
|
Subject: [PATCH] nvmem: sec-qfprom: Add Qualcomm secure QFPROM support
|
|
|
|
For some of the Qualcomm SoC's, it is possible that
|
|
some of the fuse regions or entire qfprom region is
|
|
protected from non-secure access. In such situations,
|
|
the OS will have to use secure calls to read the region.
|
|
With that motivation, add secure qfprom driver.
|
|
|
|
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
|
|
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
|
|
---
|
|
drivers/nvmem/Kconfig | 13 ++++++
|
|
drivers/nvmem/Makefile | 2 +
|
|
drivers/nvmem/sec-qfprom.c | 96 ++++++++++++++++++++++++++++++++++++++
|
|
3 files changed, 111 insertions(+)
|
|
create mode 100644 drivers/nvmem/sec-qfprom.c
|
|
|
|
--- a/drivers/nvmem/Kconfig
|
|
+++ b/drivers/nvmem/Kconfig
|
|
@@ -226,6 +226,19 @@ config NVMEM_QCOM_QFPROM
|
|
This driver can also be built as a module. If so, the module
|
|
will be called nvmem_qfprom.
|
|
|
|
+config NVMEM_QCOM_SEC_QFPROM
|
|
+ tristate "QCOM SECURE QFPROM Support"
|
|
+ depends on ARCH_QCOM || COMPILE_TEST
|
|
+ depends on HAS_IOMEM
|
|
+ depends on OF
|
|
+ select QCOM_SCM
|
|
+ help
|
|
+ Say y here to enable secure QFPROM support. The secure QFPROM provides access
|
|
+ functions for QFPROM data to rest of the drivers via nvmem interface.
|
|
+
|
|
+ This driver can also be built as a module. If so, the module will be called
|
|
+ nvmem_sec_qfprom.
|
|
+
|
|
config NVMEM_RAVE_SP_EEPROM
|
|
tristate "Rave SP EEPROM Support"
|
|
depends on RAVE_SP_CORE
|
|
--- a/drivers/nvmem/Makefile
|
|
+++ b/drivers/nvmem/Makefile
|
|
@@ -46,6 +46,8 @@ obj-$(CONFIG_NVMEM_NINTENDO_OTP) += nvme
|
|
nvmem-nintendo-otp-y := nintendo-otp.o
|
|
obj-$(CONFIG_NVMEM_QCOM_QFPROM) += nvmem_qfprom.o
|
|
nvmem_qfprom-y := qfprom.o
|
|
+obj-$(CONFIG_NVMEM_QCOM_SEC_QFPROM) += nvmem_sec_qfprom.o
|
|
+nvmem_sec_qfprom-y := sec-qfprom.o
|
|
obj-$(CONFIG_NVMEM_RAVE_SP_EEPROM) += nvmem-rave-sp-eeprom.o
|
|
nvmem-rave-sp-eeprom-y := rave-sp-eeprom.o
|
|
obj-$(CONFIG_NVMEM_RMEM) += nvmem-rmem.o
|
|
--- /dev/null
|
|
+++ b/drivers/nvmem/sec-qfprom.c
|
|
@@ -0,0 +1,96 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+/*
|
|
+ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
|
|
+ */
|
|
+
|
|
+#include <linux/qcom_scm.h>
|
|
+#include <linux/mod_devicetable.h>
|
|
+#include <linux/nvmem-provider.h>
|
|
+#include <linux/platform_device.h>
|
|
+#include <linux/pm_runtime.h>
|
|
+
|
|
+/**
|
|
+ * struct sec_qfprom - structure holding secure qfprom attributes
|
|
+ *
|
|
+ * @base: starting physical address for secure qfprom corrected address space.
|
|
+ * @dev: qfprom device structure.
|
|
+ */
|
|
+struct sec_qfprom {
|
|
+ phys_addr_t base;
|
|
+ struct device *dev;
|
|
+};
|
|
+
|
|
+static int sec_qfprom_reg_read(void *context, unsigned int reg, void *_val, size_t bytes)
|
|
+{
|
|
+ struct sec_qfprom *priv = context;
|
|
+ unsigned int i;
|
|
+ u8 *val = _val;
|
|
+ u32 read_val;
|
|
+ u8 *tmp;
|
|
+
|
|
+ for (i = 0; i < bytes; i++, reg++) {
|
|
+ if (i == 0 || reg % 4 == 0) {
|
|
+ if (qcom_scm_io_readl(priv->base + (reg & ~3), &read_val)) {
|
|
+ dev_err(priv->dev, "Couldn't access fuse register\n");
|
|
+ return -EINVAL;
|
|
+ }
|
|
+ tmp = (u8 *)&read_val;
|
|
+ }
|
|
+
|
|
+ val[i] = tmp[reg & 3];
|
|
+ }
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int sec_qfprom_probe(struct platform_device *pdev)
|
|
+{
|
|
+ struct nvmem_config econfig = {
|
|
+ .name = "sec-qfprom",
|
|
+ .stride = 1,
|
|
+ .word_size = 1,
|
|
+ .id = NVMEM_DEVID_AUTO,
|
|
+ .reg_read = sec_qfprom_reg_read,
|
|
+ };
|
|
+ struct device *dev = &pdev->dev;
|
|
+ struct nvmem_device *nvmem;
|
|
+ struct sec_qfprom *priv;
|
|
+ struct resource *res;
|
|
+
|
|
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
|
|
+ if (!priv)
|
|
+ return -ENOMEM;
|
|
+
|
|
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
+ if (!res)
|
|
+ return -EINVAL;
|
|
+
|
|
+ priv->base = res->start;
|
|
+
|
|
+ econfig.size = resource_size(res);
|
|
+ econfig.dev = dev;
|
|
+ econfig.priv = priv;
|
|
+
|
|
+ priv->dev = dev;
|
|
+
|
|
+ nvmem = devm_nvmem_register(dev, &econfig);
|
|
+
|
|
+ return PTR_ERR_OR_ZERO(nvmem);
|
|
+}
|
|
+
|
|
+static const struct of_device_id sec_qfprom_of_match[] = {
|
|
+ { .compatible = "qcom,sec-qfprom" },
|
|
+ {/* sentinel */},
|
|
+};
|
|
+MODULE_DEVICE_TABLE(of, sec_qfprom_of_match);
|
|
+
|
|
+static struct platform_driver qfprom_driver = {
|
|
+ .probe = sec_qfprom_probe,
|
|
+ .driver = {
|
|
+ .name = "qcom_sec_qfprom",
|
|
+ .of_match_table = sec_qfprom_of_match,
|
|
+ },
|
|
+};
|
|
+module_platform_driver(qfprom_driver);
|
|
+MODULE_DESCRIPTION("Qualcomm Secure QFPROM driver");
|
|
+MODULE_LICENSE("GPL");
|