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2c0cec1eb0
The backports introduced in commit d40756563c ("kernel: backport
phylink changes from mainline Linux") broke the mv88e6xxx DSA driver.
A backport to fix this was added to the kirkwood target, but as it is
used in multiple targets, and there's a kmod package for it, the fix
should be in generic backports.
This fixes the switch on the WatchGuard Firebox M300 when running the
6.1 testing kernel.
There is no need to backport the fix for the 6.6 kernel, as it was
included in 6.6.5.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
154 lines
5.1 KiB
Diff
154 lines
5.1 KiB
Diff
From 23680321789863bab2d60af507858ce50ff9f56a Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alexis=20Lothor=C3=A9?= <alexis.lothore@bootlin.com>
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Date: Mon, 29 May 2023 10:02:46 +0200
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Subject: [PATCH 6/6] net: dsa: mv88e6xxx: enable support for 88E6361 switch
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Marvell 88E6361 is an 8-port switch derived from the
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88E6393X/88E9193X/88E6191X switches family. It can benefit from the
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existing mv88e6xxx driver by simply adding the proper switch description in
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the driver. Main differences with other switches from this
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family are:
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- 8 ports exposed (instead of 11): ports 1, 2 and 8 not available
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- No 5GBase-x nor SFI/USXGMII support
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Signed-off-by: Alexis Lothoré <alexis.lothore@bootlin.com>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/dsa/mv88e6xxx/chip.c | 42 ++++++++++++++++++++++++++++----
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drivers/net/dsa/mv88e6xxx/chip.h | 3 ++-
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drivers/net/dsa/mv88e6xxx/port.c | 14 ++++++++---
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drivers/net/dsa/mv88e6xxx/port.h | 1 +
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4 files changed, 51 insertions(+), 9 deletions(-)
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--- a/drivers/net/dsa/mv88e6xxx/chip.c
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+++ b/drivers/net/dsa/mv88e6xxx/chip.c
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@@ -809,6 +809,8 @@ static void mv88e6393x_phylink_get_caps(
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unsigned long *supported = config->supported_interfaces;
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bool is_6191x =
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chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6191X;
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+ bool is_6361 =
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+ chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6361;
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mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported);
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@@ -823,13 +825,17 @@ static void mv88e6393x_phylink_get_caps(
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/* 6191X supports >1G modes only on port 10 */
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if (!is_6191x || port == 10) {
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__set_bit(PHY_INTERFACE_MODE_2500BASEX, supported);
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- __set_bit(PHY_INTERFACE_MODE_5GBASER, supported);
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- __set_bit(PHY_INTERFACE_MODE_10GBASER, supported);
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+ config->mac_capabilities |= MAC_2500FD;
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+
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+ /* 6361 only supports up to 2500BaseX */
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+ if (!is_6361) {
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+ __set_bit(PHY_INTERFACE_MODE_5GBASER, supported);
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+ __set_bit(PHY_INTERFACE_MODE_10GBASER, supported);
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+ config->mac_capabilities |= MAC_5000FD |
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+ MAC_10000FD;
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+ }
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/* FIXME: USXGMII is not supported yet */
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/* __set_bit(PHY_INTERFACE_MODE_USXGMII, supported); */
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-
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- config->mac_capabilities |= MAC_2500FD | MAC_5000FD |
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- MAC_10000FD;
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}
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}
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@@ -6243,6 +6249,32 @@ static const struct mv88e6xxx_info mv88e
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.ptp_support = true,
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.ops = &mv88e6352_ops,
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},
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+ [MV88E6361] = {
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+ .prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6361,
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+ .family = MV88E6XXX_FAMILY_6393,
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+ .name = "Marvell 88E6361",
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+ .num_databases = 4096,
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+ .num_macs = 16384,
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+ .num_ports = 11,
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+ /* Ports 1, 2 and 8 are not routed */
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+ .invalid_port_mask = BIT(1) | BIT(2) | BIT(8),
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+ .num_internal_phys = 5,
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+ .internal_phys_offset = 3,
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+ .max_vid = 4095,
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+ .max_sid = 63,
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+ .port_base_addr = 0x0,
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+ .phy_base_addr = 0x0,
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+ .global1_addr = 0x1b,
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+ .global2_addr = 0x1c,
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+ .age_time_coeff = 3750,
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+ .g1_irqs = 10,
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+ .g2_irqs = 14,
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+ .atu_move_port_mask = 0x1f,
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+ .pvt = true,
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+ .multi_chip = true,
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+ .ptp_support = true,
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+ .ops = &mv88e6393x_ops,
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+ },
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[MV88E6390] = {
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.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6390,
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.family = MV88E6XXX_FAMILY_6390,
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--- a/drivers/net/dsa/mv88e6xxx/chip.h
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+++ b/drivers/net/dsa/mv88e6xxx/chip.h
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@@ -82,6 +82,7 @@ enum mv88e6xxx_model {
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MV88E6350,
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MV88E6351,
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MV88E6352,
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+ MV88E6361,
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MV88E6390,
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MV88E6390X,
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MV88E6393X,
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@@ -100,7 +101,7 @@ enum mv88e6xxx_family {
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MV88E6XXX_FAMILY_6351, /* 6171 6175 6350 6351 */
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MV88E6XXX_FAMILY_6352, /* 6172 6176 6240 6352 */
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MV88E6XXX_FAMILY_6390, /* 6190 6190X 6191 6290 6390 6390X */
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- MV88E6XXX_FAMILY_6393, /* 6191X 6193X 6393X */
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+ MV88E6XXX_FAMILY_6393, /* 6191X 6193X 6361 6393X */
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};
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/**
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--- a/drivers/net/dsa/mv88e6xxx/port.c
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+++ b/drivers/net/dsa/mv88e6xxx/port.c
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@@ -424,6 +424,10 @@ int mv88e6393x_port_set_speed_duplex(str
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u16 reg, ctrl;
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int err;
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+ if (chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6361 &&
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+ speed > 2500)
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+ return -EOPNOTSUPP;
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+
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if (speed == 200 && port != 0)
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return -EOPNOTSUPP;
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@@ -506,10 +510,14 @@ int mv88e6393x_port_set_speed_duplex(str
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phy_interface_t mv88e6393x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
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int port)
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{
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- if (port == 0 || port == 9 || port == 10)
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- return PHY_INTERFACE_MODE_10GBASER;
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- return PHY_INTERFACE_MODE_NA;
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+ if (port != 0 && port != 9 && port != 10)
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+ return PHY_INTERFACE_MODE_NA;
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+
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+ if (chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6361)
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+ return PHY_INTERFACE_MODE_2500BASEX;
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+
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+ return PHY_INTERFACE_MODE_10GBASER;
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}
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static int mv88e6xxx_port_set_cmode(struct mv88e6xxx_chip *chip, int port,
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--- a/drivers/net/dsa/mv88e6xxx/port.h
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+++ b/drivers/net/dsa/mv88e6xxx/port.h
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@@ -133,6 +133,7 @@
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#define MV88E6XXX_PORT_SWITCH_ID_PROD_6220 0x2200
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#define MV88E6XXX_PORT_SWITCH_ID_PROD_6240 0x2400
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#define MV88E6XXX_PORT_SWITCH_ID_PROD_6250 0x2500
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+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6361 0x2610
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#define MV88E6XXX_PORT_SWITCH_ID_PROD_6290 0x2900
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#define MV88E6XXX_PORT_SWITCH_ID_PROD_6321 0x3100
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#define MV88E6XXX_PORT_SWITCH_ID_PROD_6141 0x3400
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