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158 lines
3.3 KiB
C
158 lines
3.3 KiB
C
/*
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* Copyright (C) ADMtek Incorporated.
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* Creator : daniell@admtek.com.tw
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* Carsten Langgaard, carstenl@mips.com
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* Copyright (C) 2000, 2001 MIPS Technologies, Inc.
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* Copyright (C) 2001 Ralf Baechle
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* Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
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*/
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#include <linux/autoconf.h>
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#include <linux/init.h>
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#include <linux/kernel_stat.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/slab.h>
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#include <linux/random.h>
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#include <linux/pm.h>
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#include <asm/irq.h>
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#include <asm/time.h>
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#include <asm/mipsregs.h>
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#include <asm/gdb-stub.h>
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#include <asm/irq_cpu.h>
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#define MIPS_CPU_TIMER_IRQ 7
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extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
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extern irq_desc_t irq_desc[];
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extern asmlinkage void mipsIRQ(void);
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int mips_int_lock(void);
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void mips_int_unlock(int);
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unsigned int mips_counter_frequency;
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#define ADM5120_INTC_REG(reg) (*(volatile u32 *)(KSEG1ADDR(0x12200000+(reg))))
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#define ADM5120_INTC_STATUS ADM5120_INTC_REG(0x00)
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#define ADM5120_INTC_ENABLE ADM5120_INTC_REG(0x08)
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#define ADM5120_INTC_DISABLE ADM5120_INTC_REG(0x0c)
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#define ADM5120_IRQ_MAX 9
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#define ADM5120_IRQ_MASK 0x3ff
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void adm5120_hw0_irqdispatch(struct pt_regs *regs)
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{
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unsigned long intsrc;
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int i;
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intsrc = ADM5120_INTC_STATUS & ADM5120_IRQ_MASK;
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if (intsrc) {
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for (i = 0; intsrc; intsrc >>= 1, i++)
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if (intsrc & 0x1)
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do_IRQ(i);
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} else
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spurious_interrupt();
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}
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void mips_timer_interrupt(struct pt_regs *regs)
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{
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write_c0_compare(read_c0_count()+ mips_counter_frequency/HZ);
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ll_timer_interrupt(MIPS_CPU_TIMER_IRQ);
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}
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/* Main interrupt dispatcher */
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asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
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{
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unsigned int cp0_cause = read_c0_cause() & read_c0_status();
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if (cp0_cause & CAUSEF_IP7) {
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mips_timer_interrupt( regs);
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} else if (cp0_cause & CAUSEF_IP2) {
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adm5120_hw0_irqdispatch( regs);
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}
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}
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void enable_adm5120_irq(unsigned int irq)
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{
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int s;
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/* Disable all interrupts (FIQ/IRQ) */
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s = mips_int_lock();
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if ((irq < 0) || (irq > ADM5120_IRQ_MAX))
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goto err_exit;
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ADM5120_INTC_ENABLE = (1<<irq);
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err_exit:
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/* Restore the interrupts states */
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mips_int_unlock(s);
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}
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void disable_adm5120_irq(unsigned int irq)
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{
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int s;
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/* Disable all interrupts (FIQ/IRQ) */
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s = mips_int_lock();
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if ((irq < 0) || (irq > ADM5120_IRQ_MAX))
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goto err_exit;
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ADM5120_INTC_DISABLE = (1<<irq);
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err_exit:
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/* Restore the interrupts states */
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mips_int_unlock(s);
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}
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unsigned int startup_adm5120_irq(unsigned int irq)
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{
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enable_adm5120_irq(irq);
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return 0;
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}
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void shutdown_adm5120_irq(unsigned int irq)
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{
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disable_adm5120_irq(irq);
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}
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static inline void ack_adm5120_irq(unsigned int irq_nr)
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{
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ADM5120_INTC_DISABLE = (1 << irq_nr);
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}
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static void end_adm5120_irq(unsigned int irq_nr)
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{
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ADM5120_INTC_ENABLE = (1 << irq_nr);
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}
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static hw_irq_controller adm5120_irq_type = {
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.typename = "MIPS",
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.startup = startup_adm5120_irq,
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.shutdown = shutdown_adm5120_irq,
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.enable = enable_adm5120_irq,
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.disable = disable_adm5120_irq,
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.ack = ack_adm5120_irq,
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.end = end_adm5120_irq,
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.set_affinity = NULL,
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};
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void __init arch_init_irq(void)
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{
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int i;
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for (i = 0; i <= ADM5120_IRQ_MAX; i++) {
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irq_desc[i].status = IRQ_DISABLED;
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irq_desc[i].action = 0;
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irq_desc[i].depth = 1;
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irq_desc[i].chip = &adm5120_irq_type;
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}
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}
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