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5c2eca676a
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.24
Removed upstreamed:
generic/backport-6.6/838-v6.9-leds-trigger-netdev-Fix-kernel-panic-on-interface-re.patch[1]
generic/backport-6.6/981-mtd-spinand-Add-support-for-5-byte-IDs.patch[2]
mediatek/patches-6.6/831-thermal-drivers-mediatek-Fix-control-buffer-enablement-on-MT7896.patch[3]
Removed:
ipq40xx/patches-6.6/110-mtd-limit-OTP-nvmem-to-non-nand-devices.patch[4]
All other patches automatically rebased.
1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.24&id=10f2af1af8ab8a7064f193446abd5579d3def7e3
2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.24&id=9c74507e6c4382d12a5e418742b81fd441f03313
3. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.24&id=fe750e2744428be6aec7395b13df3b34381ce6b6
4. Acknowledgment to @DragonBlurp for pointing out the redundancy of this patch. dd78a59cd7
Build system: x86/64
Build-tested: x86/64/AMD Cezanne, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
Run-tested: x86/64/AMD Cezanne, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
Signed-off-by: John Audia <therealgraysky@proton.me>
26 lines
1.0 KiB
Diff
26 lines
1.0 KiB
Diff
From 43d9788f546d24df22d8ba3fcc2497d7ccc198f3 Mon Sep 17 00:00:00 2001
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From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
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Date: Sat, 30 Jan 2021 10:50:11 +0530
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Subject: [PATCH] clk: qcom: Add WCSSAON reset
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Add WCSSAON reset required for Q6v5 on IPQ8074 SoC.
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Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
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Signed-off-by: Sricharan R <sricharan@codeaurora.org>
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Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
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Acked-by: Stephen Boyd <sboyd@kernel.org>
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---
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drivers/clk/qcom/gcc-ipq8074.c | 1 +
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1 file changed, 1 insertion(+)
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--- a/drivers/clk/qcom/gcc-ipq8074.c
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+++ b/drivers/clk/qcom/gcc-ipq8074.c
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@@ -4712,6 +4712,7 @@ static const struct qcom_reset_map gcc_i
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[GCC_NSSPORT4_RESET] = { .reg = 0x68014, .bitmask = BIT(27) | GENMASK(9, 8) },
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[GCC_NSSPORT5_RESET] = { .reg = 0x68014, .bitmask = BIT(28) | GENMASK(11, 10) },
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[GCC_NSSPORT6_RESET] = { .reg = 0x68014, .bitmask = BIT(29) | GENMASK(13, 12) },
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+ [GCC_WCSSAON_RESET] = { 0x59010, 0 },
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};
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static struct gdsc *gcc_ipq8074_gdscs[] = {
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