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4300bc6688
Specifications: SoC: MediaTek MT7981B RAM: 256MiB Flash: SPI-NAND 128 MiB Switch: 1 WAN, 3 LAN (Gigabit) Buttons: Reset, Mesh Power: DC 12V 1A WiFi: MT7976CN UART: 115200n8 UART Layout: VCC-RX-TX-GND No. of Antennas: 6 Note: Upon opening the router, only 5 antennas were connected to the mainboard. Led Layout: Power-Mesh-5gwifi-WAN-LAN3-LAN2-LAN1-2gWiFi Buttons: Reset-Mesh Installation: A. Through OpenWrt Dashboard: If your router comes with OpenWrt preinstalled (modified by the seller), you can easily upgrade by going to the dashboard (192.168.1.1) and then navigate to System -> Backup/Flash firmware, then flash the firmware B. Through TFTP Standard installation via UART: 1. Connect USB Serial Adapter to the UART, (NOTE: Don't connect the VCC pin). 2. Power on the router. Make sure that you can access your router via UART. 3. Restart the router then repeatedly press ctrl + c to skip default boot. 4. Type > bootmenu 5. Press '2' to select upgrade firmware 6. Press 'Y' on 'Run image after upgrading?' 7. Press '0' and hit 'enter' to select TFTP client (default) 8. Fill the U-Boot's IP address and TFTP server's IP address. 9. Finally, enter the 'firmware' filename. Signed-off-by: Ian Oderon <ianoderon@gmail.com>
270 lines
4.6 KiB
Plaintext
270 lines
4.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "mt7981.dtsi"
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/ {
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model = "Zbtlink ZBT-Z8103AX";
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compatible = "zbtlink,zbt-z8103ax", "mediatek,mt7981";
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aliases {
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serial0 = &uart0;
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led-boot = &led_status_green;
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led-failsafe = &led_status_red;
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led-running = &led_status_green;
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led-upgrade = &led_status_green;
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label-mac-device = &gmac0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 loglevel=8";
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};
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memory {
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reg = <0 0x40000000 0 0x10000000>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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button-mesh {
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label = "mesh";
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linux,code = <BTN_0>;
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linux,input-type = <EV_SW>;
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gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
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};
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button-reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led-wan {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WAN;
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gpios = <&pio 8 GPIO_ACTIVE_LOW>;
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};
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led-status-blue {
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_STATUS;
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gpios = <&pio 23 GPIO_ACTIVE_HIGH>;
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};
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led_status_green: led-status-green {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_STATUS;
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gpios = <&pio 24 GPIO_ACTIVE_LOW>;
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};
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led_status_red: led-status-red {
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_STATUS;
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gpios = <&pio 25 GPIO_ACTIVE_LOW>;
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};
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led-wlan2g {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WLAN;
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gpios = <&pio 34 GPIO_ACTIVE_LOW>;
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function-enumerator = <0>;
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linux,default-trigger = "phy0tpt";
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};
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led-wlan5g {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WLAN;
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gpios = <&pio 35 GPIO_ACTIVE_LOW>;
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function-enumerator = <1>;
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linux,default-trigger = "phy1tpt";
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};
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};
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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/* LAN */
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_factory_4 2>;
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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gmac1: mac@1 {
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/* WAN */
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-mode = "gmii";
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phy-handle = <&int_gbe_phy>;
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_factory_4 3>;
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};
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};
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&mdio_bus {
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switch: switch@1f {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&pio>;
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interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_flash_pins>;
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status = "okay";
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spi_nand@0 {
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compatible = "spi-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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spi-max-frequency = <52000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bl2";
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reg = <0x0000000 0x0100000>;
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read-only;
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};
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partition@100000 {
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label = "u-boot-env";
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reg = <0x100000 0x80000>;
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};
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partition@180000 {
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label = "Factory";
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reg = <0x180000 0x200000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory: eeprom@0 {
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reg = <0x0 0x1000>;
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};
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macaddr_factory_4: macaddr@4 {
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compatible = "mac-base";
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reg = <0x4 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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partition@380000 {
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label = "FIP";
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reg = <0x380000 0x200000>;
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read-only;
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};
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partition@580000 {
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label = "ubi";
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reg = <0x580000 0x4000000>;
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};
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};
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};
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};
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&switch {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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};
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port@1 {
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reg = <1>;
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label = "lan2";
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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&pio {
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spi0_flash_pins: spi0-pins {
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mux {
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
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};
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conf-pd {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&wifi {
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status = "okay";
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nvmem-cells = <&eeprom_factory>;
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nvmem-cell-names = "eeprom";
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};
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