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597f87ebf5
Three PHYs share the same identifier. Until now we simply assume the type depending of the bus address it is attached to. Make it better and check the chip mode register instead. The kernel will either detect by id/mask or by match_phy_device(). Remove the unneeded settings. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/16457 Signed-off-by: Robert Marko <robimarko@gmail.com>
70 lines
2.1 KiB
C
70 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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struct rtl83xx_shared_private {
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char *name;
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};
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struct __attribute__ ((__packed__)) part {
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uint16_t start;
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uint8_t wordsize;
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uint8_t words;
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};
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struct __attribute__ ((__packed__)) fw_header {
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uint32_t magic;
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uint32_t phy;
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uint32_t checksum;
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uint32_t version;
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struct part parts[10];
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};
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/* TODO: fixed path? */
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#define FIRMWARE_838X_8380_1 "rtl838x_phy/rtl838x_8380.fw"
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#define FIRMWARE_838X_8214FC_1 "rtl838x_phy/rtl838x_8214fc.fw"
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#define FIRMWARE_838X_8218b_1 "rtl838x_phy/rtl838x_8218b.fw"
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#define PHY_ID_RTL8214C 0x001cc942
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#define PHY_ID_RTL8218B_E 0x001cc980
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#define PHY_ID_RTL8214_OR_8218 0x001cc981
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#define PHY_ID_RTL8218D 0x001cc983
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#define PHY_ID_RTL8218B_I 0x001cca40
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#define PHY_ID_RTL8221B 0x001cc849
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#define PHY_ID_RTL8226 0x001cc838
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#define PHY_ID_RTL8390_GENERIC 0x001ccab0
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#define PHY_ID_RTL8393_I 0x001c8393
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#define PHY_ID_RTL9300_I 0x70d03106
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/* These PHYs share the same id (0x001cc981) */
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#define PHY_IS_NOT_RTL821X 0
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#define PHY_IS_RTL8214FC 1
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#define PHY_IS_RTL8214FB 2
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#define PHY_IS_RTL8218B_E 3
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/* Registers of the internal Serdes of the 8380 */
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#define RTL838X_SDS_MODE_SEL (0x0028)
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#define RTL838X_SDS_CFG_REG (0x0034)
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#define RTL838X_INT_MODE_CTRL (0x005c)
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#define RTL838X_DMY_REG31 (0x3b28)
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#define RTL8380_SDS4_FIB_REG0 (0xF800)
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#define RTL838X_SDS4_REG28 (0xef80)
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#define RTL838X_SDS4_DUMMY0 (0xef8c)
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#define RTL838X_SDS5_EXT_REG6 (0xf18c)
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#define RTL838X_SDS4_FIB_REG0 (RTL838X_SDS4_REG28 + 0x880)
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#define RTL838X_SDS5_FIB_REG0 (RTL838X_SDS4_REG28 + 0x980)
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/* Registers of the internal SerDes of the RTL8390 */
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#define RTL839X_SDS12_13_XSG0 (0xB800)
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/* Registers of the internal Serdes of the 9300 */
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#define RTL930X_SDS_INDACS_CMD (0x03B0)
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#define RTL930X_SDS_INDACS_DATA (0x03B4)
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#define RTL930X_MAC_FORCE_MODE_CTRL (0xCA1C)
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/* Registers of the internal SerDes of the 9310 */
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#define RTL931X_SERDES_INDRT_ACCESS_CTRL (0x5638)
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#define RTL931X_SERDES_INDRT_DATA_CTRL (0x563C)
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#define RTL931X_SERDES_MODE_CTRL (0x13cc)
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#define RTL931X_PS_SERDES_OFF_MODE_CTRL_ADDR (0x13F4)
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#define RTL931X_MAC_SERDES_MODE_CTRL(sds) (0x136C + (((sds) << 2)))
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