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e7bfda2c24
This change makes the names of Broadcom targets consistent by using the common notation based on SoC/CPU ID (which is used internally anyway), bcmXXXX instead of brcmXXXX. This is even used for target TITLE in make menuconfig already, only the short target name used brcm so far. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
122 lines
2.3 KiB
ArmAsm
122 lines
2.3 KiB
ArmAsm
/*
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* LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
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*
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* Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
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*
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* Some parts of this code was based on the OpenWrt specific lzma-loader
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* for the BCM47xx and ADM5120 based boards:
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* Copyright (C) 2004 Manuel Novoa III (mjn3@codepoet.org)
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* Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <asm/asm.h>
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#include <asm/regdef.h>
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#include "cp0regdef.h"
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#include "cacheops.h"
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#include "config.h"
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#define KSEG0 0x80000000
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.macro ehb
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sll zero, 3
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.endm
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.text
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LEAF(startup)
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.set noreorder
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.set mips32
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mtc0 zero, CP0_WATCHLO # clear watch registers
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mtc0 zero, CP0_WATCHHI
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mtc0 zero, CP0_CAUSE # clear before writing status register
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mfc0 t0, CP0_STATUS
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li t1, 0x1000001f
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or t0, t1
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xori t0, 0x1f
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mtc0 t0, CP0_STATUS
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ehb
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mtc0 zero, CP0_COUNT
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mtc0 zero, CP0_COMPARE
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ehb
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la t0, __reloc_label # get linked address of label
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bal __reloc_label # branch and link to label to
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nop # get actual address
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__reloc_label:
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subu t0, ra, t0 # get reloc_delta
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beqz t0, __reloc_done # if delta is 0 we are in the right place
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nop
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/* Copy our code to the right place */
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la t1, _code_start # get linked address of _code_start
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la t2, _code_end # get linked address of _code_end
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addu t0, t0, t1 # calculate actual address of _code_start
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__reloc_copy:
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lw t3, 0(t0)
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sw t3, 0(t1)
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add t1, 4
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blt t1, t2, __reloc_copy
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add t0, 4
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/* flush cache */
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la t0, _code_start
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la t1, _code_end
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li t2, ~(CONFIG_CACHELINE_SIZE - 1)
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and t0, t2
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and t1, t2
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li t2, CONFIG_CACHELINE_SIZE
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b __flush_check
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nop
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__flush_line:
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cache Hit_Writeback_Inv_D, 0(t0)
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cache Hit_Invalidate_I, 0(t0)
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add t0, t2
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__flush_check:
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bne t0, t1, __flush_line
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nop
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sync
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__reloc_done:
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/* clear bss */
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la t0, _bss_start
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la t1, _bss_end
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b __bss_check
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nop
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__bss_fill:
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sw zero, 0(t0)
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addi t0, 4
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__bss_check:
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bne t0, t1, __bss_fill
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nop
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/* Setup new "C" stack */
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la sp, _stack
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/* reserve stack space for a0-a3 registers */
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subu sp, 16
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/* jump to the decompressor routine */
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la t0, loader_main
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jr t0
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nop
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.set reorder
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END(startup)
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