mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-21 06:33:41 +00:00
246 lines
5.6 KiB
Diff
246 lines
5.6 KiB
Diff
--- /dev/null
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+++ b/arch/powerpc/boot/dts/rb600.dts
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@@ -0,0 +1,242 @@
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+/*
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+ * RouterBOARD 600 series Device Tree Source
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+ *
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+ * Copyright 2009 Michael Guntsche <mike@it-loops.com>
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License as published by the
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+ * Free Software Foundation; either version 2 of the License, or (at your
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+ * option) any later version.
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+ */
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+
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+/dts-v1/;
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+
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+/ {
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+ model = "RB600";
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+ compatible = "MPC83xx";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ aliases {
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+ ethernet0 = &enet0;
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+ ethernet1 = &enet1;
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+ };
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+
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+ chosen {
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+ linux,stdout-path = "/soc8343@e0000000/serial@4500";
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+ };
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+
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+ cpus {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ PowerPC,8343E@0 {
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+ device_type = "cpu";
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+ reg = <0x0>;
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+ d-cache-line-size = <0x20>;
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+ i-cache-line-size = <0x20>;
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+ d-cache-size = <0x8000>;
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+ i-cache-size = <0x8000>;
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+ timebase-frequency = <0x0000000>; // filled by the bootwrapper from the firmware blob
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+ clock-frequency = <0x00000000>; // filled by the bootwrapper from the firmware blob
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+ };
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+ };
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+
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+ memory {
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+ device_type = "memory";
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+ reg = <0x0 0x0000000>; // filled by the bootwrapper from the firmware blob
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+ };
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+
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+ cf@f9200000 {
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+ lb-timings = <0x5dc 0x3e8 0x1194 0x5dc 0x2af8>;
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+ interrupt-at-level = <0x0>;
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+ interrupt-parent = <&ipic>;
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+ interrupts = <0x16 0x8>;
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+ lbc_extra_divider = <0x1>;
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+ reg = <0xf9200000 0x200000>;
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+ device_type = "rb,cf";
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+ };
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+
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+ cf@f9000000 {
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+ lb-timings = <0x5dc 0x3e8 0x1194 0x5dc 0x2af8>;
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+ interrupt-at-level = <0x0>;
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+ interrupt-parent = <&ipic>;
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+ interrupts = <0x14 0x8>;
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+ lbc_extra_divider = <0x1>;
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+ reg = <0xf9000000 0x200000>;
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+ device_type = "rb,cf";
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+ };
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+
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+ flash {
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+ reg = <0xff800000 0x20000>;
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+ };
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+
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+ nnand {
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+ reg = <0xf0000000 0x1000>;
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+ };
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+
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+ nand {
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+ ale = <&gpio 0x6>;
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+ cle = <&gpio 0x5>;
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+ nce = <&gpio 0x4>;
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+ rdy = <&gpio 0x3>;
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+ reg = <0xf8000000 0x1000>;
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+ device_type = "rb,nand";
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+ };
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+
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+ fancon {
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+ interrupt-parent = <&ipic>;
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+ interrupts = <0x17 0x8>;
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+ sense = <&gpio 0x7>;
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+ fan_on = <&gpio 0x9>;
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+ };
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+
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+ pci0: pci@e0008500 {
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+ device_type = "pci";
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+ compatible = "fsl,mpc8349-pci";
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+ reg = <0xe0008500 0x100 0xe0008300 0x8>;
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ #interrupt-cells = <1>;
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+ ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 0x1000000 0x0 0x0 0xd0000000 0x0 0x4000000>;
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+ bus-range = <0x0 0x0>;
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+ interrupt-map = <
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+ 0x5800 0x0 0x0 0x1 &ipic 0x15 0x8
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+ 0x6000 0x0 0x0 0x1 &ipic 0x30 0x8
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+ 0x6000 0x0 0x0 0x2 &ipic 0x11 0x8
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+ 0x6800 0x0 0x0 0x1 &ipic 0x11 0x8
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+ 0x6800 0x0 0x0 0x2 &ipic 0x12 0x8
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+ 0x7000 0x0 0x0 0x1 &ipic 0x12 0x8
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+ 0x7000 0x0 0x0 0x2 &ipic 0x13 0x8
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+ 0x7800 0x0 0x0 0x1 &ipic 0x13 0x8
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+ 0x7800 0x0 0x0 0x2 &ipic 0x30 0x8
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+ 0x8000 0x0 0x0 0x1 &ipic 0x30 0x8
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+ 0x8000 0x0 0x0 0x2 &ipic 0x12 0x8
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+ 0x8000 0x0 0x0 0x3 &ipic 0x11 0x8
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+ 0x8000 0x0 0x0 0x4 &ipic 0x13 0x8
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+ 0xa000 0x0 0x0 0x1 &ipic 0x30 0x8
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+ 0xa000 0x0 0x0 0x2 &ipic 0x11 0x8
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+ 0xa000 0x0 0x0 0x3 &ipic 0x12 0x8
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+ 0xa000 0x0 0x0 0x4 &ipic 0x13 0x8
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+ 0xa800 0x0 0x0 0x1 &ipic 0x11 0x8
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+ 0xa800 0x0 0x0 0x2 &ipic 0x12 0x8
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+ 0xa800 0x0 0x0 0x3 &ipic 0x13 0x8
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+ 0xa800 0x0 0x0 0x4 &ipic 0x30 0x8>;
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+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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+ interrupt-parent = <&ipic>;
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+ };
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+
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+ soc8343@e0000000 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ device_type = "soc";
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+ compatible = "simple-bus";
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+ ranges = <0x0 0xe0000000 0x100000>;
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+ reg = <0xe0000000 0x200>;
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+ bus-frequency = <0x1>;
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+
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+ led {
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+ user_led = <0x400 0x8>;
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+ };
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+
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+ beeper {
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+ reg = <0x500 0x100>;
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+ };
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+
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+ gpio: gpio@0 {
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+ reg = <0xc08 0x4>;
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+ device-id = <0x0>;
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+ compatible = "gpio";
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+ device_type = "gpio";
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+ };
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+
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+ enet0: ethernet@25000 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ cell-index = <0>;
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+ phy-handle = <&phy0>;
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+ tbi-handle = <&tbi0>;
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+ interrupt-parent = <&ipic>;
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+ interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
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+ local-mac-address = [00 00 00 00 00 00];
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+ reg = <0x25000 0x1000>;
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+ ranges = <0x0 0x25000 0x1000>;
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+ compatible = "gianfar";
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+ model = "TSEC";
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+ device_type = "network";
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+
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+ mdio@520 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ compatible = "fsl,gianfar-tbi";
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+ reg = <0x520 0x20>;
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+
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+ tbi0: tbi-phy@11 {
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+ reg = <0x11>;
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+ device_type = "tbi-phy";
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+ };
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+ };
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+ };
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+
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+ enet1: ethernet@24000 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ cell-index = <1>;
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+ phy-handle = <&phy1>;
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+ tbi-handle = <&tbi1>;
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+ interrupt-parent = <&ipic>;
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+ interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
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+ local-mac-address = [00 00 00 00 00 00];
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+ reg = <0x24000 0x1000>;
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+ ranges = <0x0 0x24000 0x1000>;
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+ compatible = "gianfar";
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+ model = "TSEC";
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+ device_type = "network";
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+
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+ mdio@520 {
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+ #size-cells = <0x0>;
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+ #address-cells = <0x1>;
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+ reg = <0x520 0x20>;
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+ compatible = "fsl,gianfar-mdio";
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+
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+ phy0: ethernet-phy@0 {
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+ device_type = "ethernet-phy";
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+ reg = <0x0>;
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+ };
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+
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+ phy1: ethernet-phy@1 {
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+ device_type = "ethernet-phy";
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+ reg = <0x1>;
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+ };
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+
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+ tbi1: tbi-phy@11 {
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+ reg = <0x11>;
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+ device_type = "tbi-phy";
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+ };
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+ };
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+ };
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+
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+ ipic: pic@700 {
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+ interrupt-controller;
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+ #address-cells = <0>;
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+ #interrupt-cells = <2>;
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+ reg = <0x700 0x100>;
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+ device_type = "ipic";
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+ };
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+
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+ serial@4500 {
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+ interrupt-parent = <&ipic>;
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+ interrupts = <0x9 0x8>;
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+ clock-frequency = <0xfe4f840>;
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+ reg = <0x4500 0x100>;
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+ compatible = "ns16550";
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+ device_type = "serial";
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+ };
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+
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+ wdt@200 {
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+ reg = <0x200 0x100>;
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+ compatible = "mpc83xx_wdt";
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+ device_type = "watchdog";
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+ };
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+ };
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+};
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